Bubble memory disk emulation system

• US 4,642,759 A
• Filed: 04/02/1984
• Issued: 02/10/1987
• Est. Priority Date: 04/02/1984
• Status: Expired due to Fees

• Current Assignee: Electronics Systems Incorporated
• Original Assignee: Targa Electronics Systems Incorporated
• Inventors: Foster, William R.
• Primary Examiner(s): Zache, Raulfe B.
• Assistant Examiner(s): Chan, Emily Yue
• Application Number:
  US06/595,692
• Time in Patent Office: 1,044 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 365/1
• US Class Current: 703/24
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0664 at device level, e.g. emulation of a storage device or system

Abstract

A magnetic bubble memory based floppy disk emulating system is provided which is capable of emulating available industry standard floppy disk drives with a simple, microprocessor controlled system in which direct memory access techniques are used to free the microprocessor to perform the control functions necessary to emulate single/double density and floppy/minifloppy disks.

Claims

1. A magnetic bubble memory (MBM) based data storage system for emulating another data storage system, comprising:

(a) a central processor bus (CPB);

(b) a central processor unit (CPU), an instruction memory for said CPU, and a dynamic buffer memory, all connected to said CPB;

(c) MBM interface means for interfacing an MBM unit with said CPB;

(d) direct bubble memory access (DBMA) means connected to said CPB for causing said MBM interface means to transfer data from said MBM to selected parts of said dynamic buffer memory through said CPB;

(e) encoder/decoder means connected to said CPB for transmitting and receiving data to and from a host system in a manner substantially identical to that of said another data storage system, said encoder/decoder means including two direct memory access (DMA) channels, one for transmission and the other for reception of data to and from said host system for transferring data to and from selected parts of said dynamic buffer memory through said PCB; and

(f) said DMA channels each having registers for addressing to said dynamic buffer memory, said registers updated by said CPU through said CPB without affecting ongoing data transfers to and from said dynamic buffer memory.

2. The system of claim 1, said DBMA means being identical in function to the DMA channel.

3. The system of claim 2, said DBMA means being responsive to said MBM interface means to initiate data transfer between said MBM unit and said dynamic buffer memory.

4. The system of claim 3, said encoder/decoder means comprising a synchronous transmitter for accepting data from said dynamic buffer memory, synchronizing said data and restraining it to the host system.

5. The system of claim 4, said encoder/decoder means comprising a synchronous receiver for receiving data from said host system, synchronizing it and outputting it onto said CPB.

6. The system of claim 5, said DMA channels each being responsive to its associated synchronous transmitter or receiver for initiating reading or writing data from or into said dynamic buffer memory, respectively.

7. The system of claim 4, said another data storage system being a floppy disk drive, said synchronous transmitter retransmitting said data to a continuous formatter which formats said data according to a selected combination of the formats:

single density encoding or double density encoding; and

floppy or mini-floppy.

8. The system of claim 5, said another data storage system being a floppy disk drive, said synchronous transmitter retransmitting said data to a continuous formatter which formats said data according to a selected combination of the formats:

single density encoding or double density encoding; and

floppy or mini-floppy.

9. The system of claim 6, said another data storage system being a floppy disk drive, said synchronous transmitter retransmitting said data to a continuous formatter which formats said data according to a selected combination of the formats:

single density encoding or double density encoding; and

floppy or mini-floppy.