Tri-state differential amplifier

• US 4,644,196 A
• Filed: 01/28/1985
• Issued: 02/17/1987
• Est. Priority Date: 01/28/1985
• Status: Expired due to Term

• Current Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Flannagan, Stephen T.
• Primary Examiner(s): Anagnos, Larry N.
• Application Number:
  US06/695,643
• Time in Patent Office: 750 Days
• Field of Search: 307/530, 307/355, 307/362, 307/473, 307/296 R, 307/496, 307/497, 307/592, 307/594, 365/207, 365/208, 365/190, 365/226, 365/227, 330/253, 330/257
• US Class Current: 327/53
• CPC Class Codes: G11C 11/412 using field-effect transistors only
• CPC Class Codes: G11C 11/5621 using charge storage in a floating gate
• CPC Class Codes: G11C 7/06 Sense amplifiers; Associated circuits , e.g. timing or triggering circuits
• CPC Class Codes: H03K 5/2481 with at least one differential stage

Abstract

An amplifier has a pair of common source transistors in which the sources are coupled together during a first mode of operation and isolated from each other during a second mode of operation. A current source provides current between a power supply terminal and these sources during the first mode and prevents current flow therebetween during the second mode. A pair of switchable loads act as loads for the common source transistors during the first mode and are switched off during the second mode.

Claims

1. A differential amplifier having an amplify mode and a tri-state mode, comprising:

a first transistor having a control electrode for receiving a first input signal, a first current electrode coupled to a load node, and a second current electrode;

a second transistor having a control electrode for receiving a second input signal, a first current electrode coupled to a second load node, and a second current electrode;

a third transistor having a control electrode for receiving an enable signal, a first current electrode coupled to the second current electrode of the first transistor, and a second current electrode coupled to the second current electrode of the second transistor;

a fourth transistor having a control electrode for receiving the enable signal, a first current electrode coupled to the second current electrode of the first transistor, and a second current electrode coupled to the first power supply terminal;

a fifth transistor having a control electrode for receiving the enable signal, a first current electrode coupled to the second current electrode of the second transistor, and a second current electrode coupled to the first power supply terminal;

a first switchable load coupled between a second power supply terminal and the first load node;

a second switchable load coupled between the second power supply terminal and the second load node; and

load control means for switching off the first and second switchable loads in the tri-state mode.

2. The amplifier of claim 1 wherein the load control means comprises:

a sixth transistor having a control electrode coupled to the enable signal, a first current electrode coupled to the second power supply terminal, and a second current electrode coupled to the first switchable load means; and

a seventh transistor having a control electrode for receiving the enable signal, a first current electrode coupled to the second power supply terminal, and a second current electrode coupled to the second switchable load means.

3. The amplifier of claim 2 wherein the first switchable load comprises:

an eighth transistor having a control electrode coupled to the second current electrode of the sixth transistor, a first current electrode coupled to the second power supply terminal, and a second current electrode coupled to the first load node.

4. The amplifier of claim 3 wherein the second switchable load comprises:

a ninth transistor having a control electrode coupled to the second current electrode of the seventh transistor, a first current electrode coupled to the second power supply terminal, and a second current electrode coupled to the second load node.

5. The amplifier of claim 4 further comprising:

a tenth transistor having a control electrode for receiving the first input signal, a first current electrode coupled to the control electrode of the ninth transistor, and a second current electrode;

an eleventh transistor having a control electrode for receiving the second input signal, a first current electrode coupled to control electrode of the eighth transistor, and a second current electrode; and

a current source means, coupled between the first power supply terminal and the second current electrodes of the tenth and eleventh transistors, for providing current therebetween during the first mode and preventing current therebetween during the second mode.

6. The amplifier of claim 5 further comprising:

a twelfth transistor having a first current electrode coupled to the second power supply terminal, and a control electrode and a second current electrode coupled to the first current electrode of the tenth transistor, and

a thirteenth transistor having a first current electrode coupled to the second power supply terminal, and a control electrode and a second current electrode coupled to the first current electrode of the eleventh transistor.

7. The amplifier of claim 6 wherein the second current source comprises:

a fourteenth transistor having a control electrode coupled to the enable signal, a first current electrode coupled to the second current electrodes of the tenth and eleventh transistors, and a second current electrode coupled to the first power supply terminal.

8. The amplifier of claim 7 wherein the first, second, third, fourth, fifth, tenth, eleventh, and fourteenth transistors are of a first conductivity type;

and the sixth, seventh, eighth, ninth, twelfth, and thirteenth transistors are of a second conductivity type.