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Display device

  • US 4,647,927 A
  • Filed: 12/16/1985
  • Issued: 03/03/1987
  • Est. Priority Date: 02/10/1982
  • Status: Expired due to Term
First Claim
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1. A display device comprising:

  • a display element array having first m drive lines, second n drive lines and m×

    n display elements arranged at intersections of said first m drive lines and said second n drive lines;

    serial shift register means having a data input, a data output, and m×

    n stages for storing pixel binary data, said m×

    n stages divided into n blocks each having m stages, only a first block of said shift register means having m parallel outputs connected to said first m drive lines;

    clock pulse signal supply means for supplying a clock pulse signal to said shift register means to shift pixel data through said shift register means, said clock pulse signal having intermittent pulse trains at intervals of a predetermined period, and each of said pulse trains having successive m clock pulses;

    a serial pixel binary data source;

    switch circuit means responsive to a select signal for selectively coupling one of said pixel data source and said data output of said shift register means to said data input of said shift register means;

    first driving circuit means responsive to said m parallel outputs of said first block of said shift register means for driving said first m drive lines of said display element array; and

    second driving circuit means responsive to said clock pulse supply means for sequentially driving said second n drive lines of said display element array;

    wherein said second driving circuit means comprises,counter means for counting said clock pulses in said clock pulse signal from said clock pulse signal supply means, anddecoder means having n outputs coupled to said n drive lines of said display element array and responsive to said counter means for sequentially producing driving signals on said n outputs thereof to sequentially drive said n drive lines of said display element array every time said counter means counts m clock pulses in said clock pulse signal.

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