System for measuring and detecting printed circuit wiring defects

• US 4,650,333 A
• Filed: 04/12/1984
• Issued: 03/17/1987
• Est. Priority Date: 04/12/1984
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: West, Mark A., DeFoster, Steven M., Ziegler, Richard A., Crabb, Robert M., Rittenhouse, Norman E.
• Primary Examiner(s): Evans, F. L.
• Assistant Examiner(s): Harringa, Joel L.
• Application Number:
  US06/599,422
• Time in Patent Office: 1,069 Days
• Field of Search: 350/358, 356/1, 356/237, 356/371, 356/376, 356/381, 358/101, 358/106, 358/107
• US Class Current: 356/606
• CPC Class Codes: G01B 11/2522 the position of the object changing and being recorded
• CPC Class Codes: G01N 21/95684 Patterns showing highly reflecting parts, e.g. metallic elements
• CPC Class Codes: G01R 31/2806 Apparatus therefor, e.g. test stations, drivers, analysers, conveyors G01R31/2805, G01R31/281, G01R31/2818 take precedence
• CPC Class Codes: G01R 31/309 of printed or hybrid circuits or circuit substrates

Abstract

A non-contact system for detecting printed circuit wiring defects and for measuring circuit feature height relative to a substrate. The system has an energy source for illuminating the substrate and circuit features and a scanner for both instantaneously receiving energy reflected from the substrate and circuit features and for generating a signal in response to the reflected energy, which signal is adapted to vary with the intensity of the reflected energy. An analyzer is connected to the scanner for correlating the generated signal to a measurement representative of the height of the circuit features relative to the substrate. Variations and non-uniformity of the substrate surface due to bending, warpage or other causes can be accounted for so as to provide an accurate measurement of the height of a circuit feature relative to the substrate surface on which it is mounted.

Claims

1. A non-contact system for detecting printed circuit wiring defects and for measuring circuit feature height relative to a substrate comprising:

(a) a laser for illuminating said substrate and circuit features thereon;

(b) a charge coupled device (CCD) having a plurality of elements disposed therein for receiving laser energy reflected from a predetermined area on said substrate and circuit features thereon and wherein said plurality of CCD elements are individually and simultaneously activated, said CCD being disposed proximate said substrate and circuit features thereon and operatively related thereto, said CCD being capable of;

(i) substantially instantaneously receiving laser energy reflected from said substrate and cirucit features thereon; and

(ii) generating a signal in response thereto, said signal varying with the intensity of said reflected laser energy; and

(c) automatic analyzing means operatively connected to said CCD for correlating said signal received therefrom to a measurement representative of height of said cirucit features on said substrate and relative thereto, said analyzing means being adapted to analyze laser energy received by each of said plurality of CCD elements for a predetermined number of cycles so that non-linearities on said substrate and circuit features thereon are detected.

2. The system in accordance with claim 1 further comprising:

(d) positioning means for moving said CCD relative to said substrate.

3. The system in accordance with claim 1 wherein said analyzing means comprises a first memory for storing data representative of said signal generated by said CCD.

4. The system in accordance with claim 3 wherein said analyzing means further comprises calculating means for using said data stored in said first memory to determine the height of said circuit features, said calculating means being operatively connected to said first memory.

5. The system in accordance with claim 4 wherein said analyzing means further comprises a second memory operatively connected to said calculating means for storing data representative of dimensions of said circuit features.

6. The system in accordance with claim 5 wherein said second memory comprises at least two memory frame devices for facilitating storage of said data representative of said dimensions of said circuit features.

7. The system in accordance with claim 6 wherein each of said memory frame devices is sequentially accessed according to a predetermined schedule.

8. The system in accordance with claim 1 further comprising:

(d) means for moving said laser energy discretely through a plurality of focal planes over at least the field of view relative to said CCD.

9. The system in accordance with claim 8 wherein said laser energy moving means is an acousto-optic modulating device.

10. A non-contact system for detecting printed circuit wiring defects and for measuring circuit feature height relative to a substrate comprising:

(a) a radiant energy source for illuminating said substrate and circuit features thereon;

(b) scanning means disposed proximate said substrate and circuit features thereon and operatively related thereto, said scanning means being capable of;

(i) substantially instantaneously receiving radiant energy reflected from said substrate and circuit features thereon; and

(ii) generating a signal in response thereto, said signal varying with the intensity of said reflected energy; and

(c) automatic analyzing means operatively connected to said scanning means for correlating said signal received therefrom to a measurement representative of height of said circuit features on said substrate and relative thereto, wherein said analyzing means is adapted to detect three categories of reflected radiant energy intensity, said categories being bounded and defined by two threshold levels and wherein one of said threshold levels separates the intensity of background radiant energy from the intensity of radiant energy reflected from said substrate.

11. The system in accordance with claim 10 wherein the other one of said threshold levels separates the intensity of radiant energy reflected from said substrate from the intensity gradiant of energy reflected from said circuit features, whereby the presence of said circuit features is detected.

12. A method for detecting printed circuit wiring defects and measuring the height of the upper surface of a circuit feature relative to a substrate having a base and an upper surface, the steps comprising:

(a) projecting radiant energy onto said substrate and circuit feature thereon;

(b) providing a scanning means for receiving reflected radiant energy;

(c) moving the radiant energy relative to said substrate such that said radiant energy is in focus at an initial focal plane below the base of said substrate and substantially parallel thereto, relative to said scanning means;

(d) generating a signal in response to said reflected radiant energy, said signal being adapted to vary with the intensity thereof;

(e) correlating said signal to a reference level of intensity representative of reflectivity;

(f) moving said radiant energy relative to said substrate such that said radiant energy is in focus at a plane above said initial focal plane and substantially parallel thereto;

(g) repeating steps (d) through (f) until the focused plane is above the level of the upper surface of said circuit feature; and

(h) correlating said signals generated in step (e) to measurements representative of the height of said circuit features and printed circuit wiring defects.

13. The method in accordance with claim 12, the steps further comprising storing a value representative of the location of the focused plane relative to said initial focal plane for each plane scanned thereby.

14. The method in accordance with claim 13, the steps further comprising subtracting the value representative of said initial focal plane from the value representative of the plane at the upper surface of said substrate to obtain a substrate upper surface height above said initial focal plane.

15. The method in accordance with claim 19, the steps further comprising periodically normalizing the value representative of the height of the upper surface of said substrate relative to said initial focal plane.

16. The method in accordance with claim 19, the steps further comprising subtracting the value representative of said initial focal plane from the value representative of the plane at the upper surface of said circuit feature to obtain a value representative of the height of said upper surface of said circuit feature relative to said initial focal plane.

17. The method in accordance with claim 16, the steps further comprising subtracting the value representative of the substrate upper surface height above said initial focal plane from said value representative of the height of the upper surface of said circuit feature relative to said initial focal plane to obtain a value representative of the height of the upper surface of said circuit feature relative to the upper surface of said substrate.

18. The method in accordance with claim 13, the steps further comprising subtracting the value representative of the focal plane at the upper surface of said substrate from the value representative of the focal plane at the upper surface of said circuit feature to obtain a value representative of the height of the upper surface thereof relative to said upper substrate surface.

19. The method in accordance with claim 18, the steps further comprising normalizing the value representative of the height of the upper surface of said substrate relative to said initial focal plane as required.