Automated single slice powered load lock plasma reactor

• US 4,657,620 A
• Filed: 10/22/1984
• Issued: 04/14/1987
• Est. Priority Date: 10/22/1984
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Brown, Frederick W., Spencer, John E., Davis, Cecil J., Hildenbrand, Randall C., Hockersmith, Dan T., Kohan, Stanford P.
• Primary Examiner(s): Powell, William A.
• Application Number:
  US06/663,905
• Time in Patent Office: 904 Days
• Field of Search: 118/728, 118/729, 118/50.1, 118/620, 156/345, 156/643, 156/646, 156/656, 156/659.1, 156/665, 156/662, 156/657, 156/626, 427/38, 427/39, 204/164, 204/192 EC, 204/192 E, 204/298
• US Class Current: 156/345.24
• CPC Class Codes: H01J 37/32 Gas-filled discharge tubes heating by discharge H05B

Abstract

A plasma reactor for the manufacturing of semiconductor devices has powered loadlocks and a main process chamber where slices can be processed one slice at a time with pre-etch plasma treatments before the main etching processing and afterwards receive a post etch treatment. The system comprises powered loadlocks, a main chamber, vacuum pumps radio frequency power supplier, radio frequency matching networks, heat exchangers and throttle valve and pressure controllers, gas flow distribution and microprocessor controllers. The semiconductor wafers are automatically fed one at a time from storage cassettes through isolation gates with articulated mechanical arms to a powered entry loadlock for pre-etching processes. At the completion of the pre-etching processing, the semiconductor wafer is transferred to the main chamber automatically for the main etch process and then to the powered exit loadlock for post etch treatment and finally to an output cassette.

Claims

1. An apparatus for the manufacturing of semiconductor devices from semiconductor wafers having a plurality of semiconductor circuit patterns on at least a first surface of the semiconductor wafer, the apparatus comprises:

first means for providing a stream of reacting gases to react with the semiconductor wafer to create circuit elements according to the semiconductor circuit pattern thereby;

second means for handling the wafers and includes a third means for bringing the wafers into contact with the reacting gas, fourth means for prereacting with a second group of reactant gases of the semiconductor wafers, fifth means for preventing the contamination of the third means and to provide a port for the transfer of the semiconductor wafers from the fourth means to the third means;

sixth means for isolating the semiconductor wafers and the circuit elements from the third means and to perform a post reactant with a third group of reactant gases, seventh means for providing a port for the transfer of the semiconductor wafer between the third means and the sixth means, and eighth means for transferring the semiconductor wafer from the fourth means to the third means and from the third means to the sixth;

means and

ninth means for controlling the operation of the apparatus.

2. The apparatus according to claim 1 wherein the first means comprises:

tenth means for providing a plurality of gases; and

eleventh means for ionizing predetermined members of the plurality of gases.

3. The apparatus according to claim 2 wherein the eleventh means comprises:

twelfth means for providing radio frequency energy;

thirteenth means connected to the twelfth means and located in the third means for providing a first plate for electrical field; and

fourteen means connected to the twelfth means located in the third means for providing a second plate for the electrical field.

4. The apparatus according to claim 1 wherein a third means, fourth means and fifth means comprises:

fifteenth means for generating a plasma; and

sixteenth means for varying the volume of the third means.

5. The apparatus according to claim 4 wherein the fifteenth means and the sixteenth means comprises:

seventeenth means for generating radio frequency energy;

eighteenth means having a generally cylindrical shape and connected to the seventeenth means for providing radio frequency energy to the third means;

nineteenth means for providing support for the semiconductor wafer, the nineteenth means being connected to the seventeenth means and having a generally cylindrical shape.

6. The apparatus according to claim 5 wherein the eighteenth means comprises:

twentieth means for connecting to the radio frequency energy source;

twenty-first means connected to ground for surrounding the twentieth means with a ground shield; and

twenty-third means for insulating the twentieth means from the twenty-first means.

7. The apparatus according to claim 5 comprising:

twenty-third means for providing a stream of gas to be ionized by the electric field between the eighteenth means and the nineteenth means and

twenty-fourth means connected to the ninteenth means for adjusting the separation between the nineteenth means and the eighteenth means.

8. The apparatus according to claim 7 wherein the reacting gases etch the semiconductor wafer and the ninth means comprises:

twenty-fifth means for detecting when the etching performed by the reacting gases has reached a predetermined depth in the semiconductor wafer.

9. The apparatus according to claim 8 the other comprising:

twenty-sixth means for controlling the temperature of the reacting gases and the semiconductor wafer.

10. The apparatus according to claim 8 wherein twenty-fifth means further comprises:

twenty-seventh means for illuminating the first surface of the semiconductor wafers; and

twenty-eigth means for detecting reflected lights when reflected from trace materials in the reacting gases, said trace materials being released from the semiconductor wafer during etching by the reacting gases.

11. The apparatus according to claim 10 wherein the twenty-seventh means includes glow from the plasma created by the reacting gases in the electrical field.

12. The apparatus according to claim 11 wherein the twenty-eigth means comprises:

first detector means for detecting the reflected light;

second detector means for detecting the reflected light; and

twenty-ninth means for comparing the output of the first detected means to the output of the second detected means.

13. The apparatus according to claim 12 wherein each of the first detector means and the second detector means comprises:

thirtieth means for selecting the bandwidth of the light detected by the twenty-eigth means; and

thirty-first means for converting the filtered light to an electrical signal to which the twenty-ninth means will respond.

14. The apparatus according to claim 13 wherein the twenty-ninth mean is a digital machine and the thirty-first means comprises:

thirty-second means for converting the light to an electrical signal;

thirty-third means for amplifying the electrical signal by a predetermined gain; and

thirty-fourth means for converting the electrical signal to a digital signal.

15. The apparatus according to claim 14 wherein the thirty-third means has an adjustable gain and the twenty-eigth means further comprises;

thirty-fifth means for adjusting the adjustable gain.

16. The apparatus according to claim 12 wherein the twenty-ninth means compares the output from a first and second detector means to a predetermined threshold.

17. The apparatus according to claim 12 wherein the comparator means obtains the difference between the first and second detector means output.

18. The apparatus according to claim 12 wherein the twenty-ninth means obtains the summation of the outputs of the first and second detector channel means.

19. The apparatus according to claim 7 wherein the sixteenth means comprises thirty-six means for confining the plasma in a gap between the eighteenth means and nineteenth means;

thirty-seventh means for applying gas to be ionized to the gap; and

thirty-eigth means for removing the plasma from the gap.

20. The apparatus according to claim 19 wherein the thirty-eigth means comprises:

thirty-ninth means for maintaining a predetermined pressure in the third means; and

the nineteenth means being an orifice having a predetermined opening for orificing the gas flow between the third means and the thirty-ninth means.

21. The apparatus according to claim 5 wherein the nineteenth means comprises:

the fortieth means for aligning the semiconductor wafer in a predetermined alignment on the nineteenth means.

22. The apparatus according to claim 21 wherein the nineteenth means further includes:

a plate of a generally cylindrical shape having a first surface for receipt of the semiconductor wafer, the plate being of a first material of a circumference less than the semiconductor wafer and having a second ring of a second material on the first surface.

23. The apparatus according to claim 22 wherein a second material comprises:

an anodized ring of the first material having a second predetermined inner circumference and a third predetermined outer circumference.

24. The apparatus according to claim 21 wherein the fortieth means further comprises:

retractable pins for lowering the semiconductor wafer onto the nineteenth means; and

a second set of retractable pins for positioning the semiconductor wafer on the nineteenth means and then being retracted.

25. The apparatus according to claim 19 wherein the thirty-sixth means comprises:

forty-first means for varying the gap between the eighteenth means and the ninteenth means;

the forty-first means consists of a bellows connected to the nineteenth means having a first predetermined radius;

a second bellows connected to the nineteenth means and surrounding the first bellows having a second predetermined radius greater than the first predetermined radius;

a forty-second means for sealing the difference between the radius of the first bellows and the second bellows; and

a forty-third means for applying pressure between the first bellows and the second bellows causing the nineteenth means to be raised or lowered depending on the pressure between the first bellows and the second bellows, the first bellows and the second bellows being contained in the third means.

26. The apparatus according to claim 1 wherein the eighth means comprises:

a first opening into the third means; and

a valve for opening and closing of the opening into the third means.

27. The apparatus according to claim 26 wherein the valve consists of a sealed plate for sealing of the opening;

a backing plate for backing of the seal plate against the opening and a camming mechanism for camming the packing plate, and the seal plate into a locked position.

28. The apparatus according to claim 5 wherein the nineteenth means comprises a cylindrical shaped conductor;

a forty-fourth means for positioning the semiconductor wafer on the cylindrical shaped conductor;

a forty-fifth means for providing thermal isolation to the cylindrical shaped conductor.

29. The apparatus according to claim 28 further comprising:

forty-sixth means for extending the radius of the cylindrical shaped conductor beyond the radius of the eighteenth means.

30. The apparatus according to claim 1 wherein the eighth means comprises a wafer transport arms for transferring the semiconductor wafer between the fourth means into the third means;

a second wafer transfer arms for transporting the semiconductor wafer from the third means into the sixth means.

31. The apparatus according to claim 28 wherein the third means has a first and second opening of a predetermined width and length and the first and second wafer transport means comprises:

a fork with a thickness and width less than the length and width of the first and second opening;

rotatable arm connected to the fork for rotating the fork in and out of the third means;

a drive mechanism for driving the rotatable arm and fork.

32. The apparatus according to claim 29 wherein the fork means has cushionings for cushioning of the semiconductor wafer.

33. The apparatus according to claim 30 includes a vacuum seal.

34. The apparatus according to claim 31 wherein the third means and sixth means further includes:

means for bringing the semiconductor wafers into contact with reactant gases.