Digital audio satellite transmission system

• US 4,660,196 A
• Filed: 01/27/1986
• Issued: 04/21/1987
• Est. Priority Date: 08/01/1983
• Status: Expired due to Term

• Current Assignee: ViaSat Incorporated
• Original Assignee: Scientific-Atlanta Incorporated (Cisco Systems, Inc.)
• Inventors: Schreiner, Peter G. III, McBride, Alan L., Chamberlin, James W., Gray, James S.
• Primary Examiner(s): Olms, Douglas W.
• Assistant Examiner(s): Scutch, III, Frank M.
• Application Number:
  US06/822,645
• Time in Patent Office: 449 Days
• Field of Search: 370/109, 370/104, 370/110.1, 370/118, 375/122, 371/43, 371/44, 371/45
• US Class Current: 370/326
• CPC Class Codes: H03M 13/05 using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits H03M13/2906 takes precedence
• CPC Class Codes: H04B 7/18523 Satellite systems for providing broadcast service to terrestrial stations, i.e. broadcast satellite service arrangements specially adapted for satellite broadcast receiving H04H40/90; picture transmission via satellite H04N1/00103; television transmission via satellite H04N7/20
• CPC Class Codes: H04H 20/28 Arrangements for simultaneous broadcast of plural pieces of information
• CPC Class Codes: H04H 20/74 of satellite networks
• CPC Class Codes: H04H 40/90 specially adapted for satellite broadcast receiving

Abstract

A digital audio satellite transmission system involving analog-to-digital conversion of audio signals, processing of such signals and transmission to and reception from a satellite transponder link. The digitized audio signal is digitally compressed to reduce the data rate. Several such signals are then time division multiplexed together. Differential encoding, bit interleaving and forward error correction coding is utilized to maintain high signal quality, together with binary phase shift key carrier modulation. Matched filter reception of the BPSK signal transmitted over a conventional satellite transponder link is provided together with BPSK demodulation, TDM demultiplexing, differential decoding, bit deinterleaving and threshold or FEC decoding. The compressed digital signal is then expanded and converted to an analog audio signal.

Claims

1. A system for demodulating and processing a modulated intermediate frequency signal containing coded, combined digital audio and digital data signals comprising:

(1) a binary phase shift key demodulator for demodulating the intermediate frequency signal into a data stream;

(2) a differential decoder for differentially decoding the data stream output by the demodulator;

(3) a bit deinterleaver for deinterleaving bits contained in the data stream output by the differential decoder;

(4) a forward error correction decoder for identifying partity bits in the data stream output by the bit deinterleaver;

(5) a demultiplexer for dividing into separate data streams the single data stream output by the forward error correction decoder;

(6) a digital expander for expanding the digitized audio signals output by the demultiplexer; and

(7) a source decoder for converting the digitized analog audio portions of the signals output by the digital expander to analog form.

2. The system in accordance with claim 1 further comprising a means for stripping the parity bits from the data stream after the partity bits have been identified.

12. A system in accordance with claims 1 or 3 wherein said binary phase shift key demodulator and differential decoder comprise:

(1) an arithmetically symetrical intermediate frequency filter for filtering the intermediate frequency signal;

(2) an automatic gain control stage for controlling the signal level;

(3) a bit synchronization stage for processing the automatic gain control signal to produce a signal condition or state estimate control signal by passing the signal through an even order nonlinearity to create a bit spectral rate component and through a narrow band filter for memory and signal to noise improvement;

(4) a carrier regeneration stage for processing the automatic gain controlled signal to produce an unmodulated carrier to provide a coherent reference signal for demodulation;

(5) a coherent detector for mixing the automatic gain controlled signal output by the automatic gain control stage with the coherent reference signal output by the carrier regeneration stage to produce a baseband output signal; and

(6) A signal conditioner for filtering the baseband output signal from the coherent detector, for making a maximum likelihood state estimate and for differentially decoding the signal into a data stream.

13. A system in accordance with claims 1 or 3 wherein said bit deinterleaver and forward error correction decoder comprise:

(1) a serial-to-parallel register and deinterleaver for splitting the data stream from the binary phase shift key demodulator into a multi-bit parallel data stream comprising information bits and one parity bit;

(2) circuitry for identifying the information bits; and

(3) a parallel-to-serial register to convert the information bits into a bit-serial data stream without the parity bit.

14. A system in accordance with claims 1 or 3 wherein said demultiplexer and digital expander comprise:

(1) frame synchronizer circuitry to derive frame synchronization and pseudorandum number generator control signals from the data stream output by the forward error correction decoder;

(2) pseudorandum number generator circuitry for providing a pseudorandum number signal under the control of the control signal from the frame synchronizer circuitry;

(3) an exclusive-OR gate for descrambling the data stream output by the forward error correction decoder by comparing it to the pseudorandum number signal and outputting a descrambled data stream;

(4) a serial-to-parallel converter for converting the decrambled data stream to bit-containing words; and

(5) an expander for expanding the number of bits containing the words output by the serial-to-parallel converter.

15. A system in accordance with claims 1 or 3 wherein said source decoder comprises:

(1) a digital-to-analog converter to convert the digitized analog audio signals to an analog voltage output;

(2) a sample-and-hold amplifier to hold one of two converted audio signals while the other is converted;

(3) deglitching amplifier for conditioning the output of the digital-to-analog converter;

(4) (Sin X)/X correction stages to correct properties of the signals; and

(5) band pass reconstruction filters for baseband reconstruction of the signals.

3. A system for demodulating and processing a modulated intermediate frequency signal containing coded, combined digital audio and digital data signals comprising:

(1) a binary phase shift key demodulator for demodulating the intermediate frequency signal into a data stream;

(2) a differential decoder for differentially decoding the data stream output by the demodulator;

(3) a bit deinterleaver for deinterleaving bits contained in the data stream output by the differential decoder;

(4) a forward error correction decoder for processing the data stream output by ythe bit deinterleaver to identify partity bits utilizing the convolutional self orthogonal code utilized in coding the signal;

(5) a demultiplexer for dividing into separate data streams the single data stream output by the forward error correction decoder;

(6) a digital expander for expanding the digitized audio signals output by the demultiplexer; and

(7) a source decoder for converting the digitized analog audio portions of the signals output by the digital expander to analog form.

4. The system in accordance with claim 3 further comprising a means for stripping the parity bits from the data stream after the parity bits have been identified.

5. A system in accordance with claim 4 wherein the data rate ater the parity bits have been stipped is 8777 megabits per second and the data rate output by said forward error correction decoder is 7.68 megabits per second.

6. A system in accordance with claim 3 wherein said forward error correction decoder utilizes a rate 7/8, J=6, dmin=7 convolutional self orthognal code with the folowing general polynominal code:

0, 3, 19, 52, 78, 146

0, 2, 8, 32, 88, 142

0, 11, 12, 62, 85, 131

0, 21, 25, 39, 82, 126

0, 5, 20, 47, 84, 144

0, 58, 96, 106, 113, 141

0, 41, 77, 108, 117, 130.

7. A system in accordance with claim 3 further comprising a descrambler preceeding the demultiplexer for descrambling the data stream input to the demultiplexer.

8. A method for receiving analog audio signals which were transmitted by:

(a) converting the analog audio signals to digital form;

(b) compressing the digital signals to reduce their data rates;

(c) combining the compressed signals into a single data stream;

(d) scrambling the data stream;

(e) differentially encoding the scrambled data steam;

(f) inverleaving the bits contained in the differentially encoded data stream;

(g) forward error correction encoding the differentially encoded data stream utilizing a convolutional self orthogonal code;

(h) binary phase shift key modulating an intermediate frequency carrier with the forward error correction coded data stream;

(i) converting the modulated intermediate frequency signal to an earth-to-satellite transmission frequency;

(j) amplifying the transmission frequency signal;

(k) transmitting the amplified signal to a geosynchronous communication satellite with transponder; and

(l) converting the signal received by the satellite to a satellite-to-earth transmission frequency and transmitting it to earth, comprising the steps of;

(m) receiving the signal transmitted from the satellite and amplifying it;

(n) converting the amplified received signal to the intermediate frequency;

(o) demodulating the received intermediate frequency signal into a received data stream;

(p) differentially decoding the received data stream;

(q) bit deinterleaving the differentially decoded data stream;

(r) idenfiying the forward error correction parity bits in the bit deinterleaved data stream utilizing the convolutional self orthogonal code utilized in encoding in the forward error correction encoding step;

(s) descrambling the data stream from which the forward error correction parity bits have been stripped;

(t) demultiplexing the descrambled data stream into separate data streams;

(u) digitally expanding the demultiplexed data streams; and

(v) converting the expanded digital data streams into analog audio signals.

9. The method for receiving analog audio signals in accordance with claim 8 further comprising the step of stripping the parity bits from the bit deinterleaved data stream.

10. A method for receiving transmitted binary phase shift key modulated, partity bit forward error correction coded, bit interleaved, differentially encoded, scrambled, combined compressed, digitized analog audio signals comprising the steps of:

(a) receiving the transmitted signal and amplifying it;

(b) demodulating the received signal into a received data stream;

(c) differentially decoding the received data stream;

(d) bit deinterleaving the differentially decoded data stream;

(e) identifying the forward error correction parity bits in the bit deinterleaved data stream;

(f) descrambling the data stream from which the forward error correction parity bits have been stripped;

(g) demultiplexing the descrambled data stream into separate data streams;

(h) digitally expanding the demultiplexed data streams; and

(i) converting the expanded digital data streams into analog audio signals.

11. The method for receiving signals in accordance with claim 10 further comprising the step of stripping the parity bits from the bit deinterleaved data stream.