Multiprocessor multisystem communications network

• US 4,663,706 A
• Filed: 10/14/1983
• Issued: 05/05/1987
• Est. Priority Date: 10/28/1982
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Tandem Computers Incorporated (HP Inc.)
• Inventors: Fisher, Steven D., Johnson, Hoke S., Peck, John C., Larson, Richard O., Bartlett, Wendy B., Allen, James C.
• Primary Examiner(s): Heckler, Thomas M.
• Application Number:
  US06/542,187
• Time in Patent Office: 1,299 Days
• Field of Search: 364/200 MS File
• US Class Current: 709/234
• CPC Class Codes: G06F 15/17337 Direct connection machines, e.g. completely connected computers, point to point communication networks coupling between buses G06F13/4004

Abstract

A plurality of multiprocessor systems is arranged in a high speed network to allow any processor in one system to communicate with any processor in another system. The network may be configured as a multi-node dual bidirectional ring having a multiprocessor system at each node. Packets of information may be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor in a selected direction between each successive transfer between neighboring nodes. The buffer locations are managed so that a node can request an adjacent node to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

Claims

1. A network of multiprocessor systems, including:

a plurality of multiprocessor systems, each of said systems containing at least one processor connected to an interprocessor bus,

a plurality of node interfaces, each connected to a respective one of said interprocessor busses, each of said node interfaces having at least one data link connecting it to at least one other node interface such that all of said node interfaces are characterized by the property of global connectivity,

a buffer memory in each of said node interfaces, having a plurality of storage locations for temporarily storing message packets to be transferred to any one of said processors in said network, said storage locations being partitioned into groups of storage locations, each one of said groups corresponding to a particular one of said processors in the network which is the destination processor for all of said message packets placed at locations therein,

control means in each of said node interfaces for controlling the transfer of said message packets into the buffer memory in its respective node interface from the data link connecting the respective interface node to its adjacent neighbor interface nodes and from the interprocessor bus connected to the respective interface node, and for controlling the transfer of said message packets out of the buffer memory in the respective node interface to the data link connecting the respective interface node to its adjacent neighbor interface nodes and to the interprocessor bus connected to the respective interface node,

means, in each of said control means, for determining how many of the storage locations in a group of storage locations (in the buffer memory in its node interface) corresponding to a particular destination processor are full.

2. The network of multiprocessor systems of claim 1 further including means in each of said control means for halting the transfer of said message packets for any destination processor when a number greater than a first predetermined member of said group of storage locations corresponding to that destination processor are full and resuming the transfer of said message packages to that destination processor when a number less than a second predetermined number of said group of storage locations corresponding to that destination processor are full.

3. The network of multiprocessor systems of claim 2 wherein said plurality of node interfaces are connected to one another by at least one data link in the form of a ring.