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Random/serial access mode selection circuit for a video memory system

  • US 4,663,735 A
  • Filed: 12/30/1983
  • Issued: 05/05/1987
  • Est. Priority Date: 12/30/1983
  • Status: Expired due to Term
First Claim
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1. Apparatus for reading data stored in a random access memory array device, said memory array comprising a plurality of memory cells arranged in rows and columns, said device having a single-bit output and a serial multiple-bit output, comprising:

  • processor means for generating a data output control signal and a row address signal, and for applying said signals to said device, andmeans in said device, responsive to said data output control signal and to said row address signal, for applying said stored data to said serial multiple-bit output responsive to said processor means applying said data output control signal to said device prior to applying said row address signal to said device, and for applying said stored data to said single-bit output of said device responsive to said processor means applying said data output control signal a predetermined time after applying said row address signal to said device.

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