Electrical system having variable-frequency clock

• US 4,670,837 A
• Filed: 06/25/1984
• Issued: 06/02/1987
• Est. Priority Date: 06/25/1984
• Status: Expired due to Term

• Current Assignee: Bell Telephone Laboratories, Inc. (Nokia Corporation)
• Original Assignee: American Telephone & Telegraph Company (AT&T, Inc.), AT&T, Inc.
• Inventors: Sheets, Laurence L.
• Primary Examiner(s): NOT, DEFINED
• Assistant Examiner(s): Lacasse, Randy W.
• Application Number:
  US06/624,469
• Time in Patent Office: 1,072 Days
• Field of Search: 364/200, 364/900, 328/62, 328/38, 365/222
• US Class Current: 713/501
• CPC Class Codes: G06F 1/08 Clock generators with changeable or programmable clock frequency
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The microprocessor unit of a system implemented using metal-oxide-silicon (MOS) technology, is driven by a variable-frequency clock. The microprocessor controls the clock frequency based on the present rate of required microprocessor activity. By driving the microprocessor unit at a lower clock frequency when such activity rate is low, the energy dissipated by the microprocessor unit is reduced due to the MOS power-frequency characteristic.

Claims

1. In an electrical system driven by a variable-frequency clock to perform processing jobs, a method of operating said system under control of a processor to increase efficiency in power consumption comprising:

determining the processing load of said system based on all requested but uncompleted processing jobs and

adjusting the frequency of said clock basewd on the determined processing load, where each of said processing jobs is one of n types, n being a positive integer greater than one, said method further comprising

maintaining data that define a number, J_K, of jobs of type K for each integer K from one through n, to be performed by said system,

wherein said determining step further comprises reading said data and

wherein said adjusting step further comprises adjusting the frequency, f, of said clock according to ##EQU2## wehrein f0 is a minimum frequency, A_K is a weighting factor associated with jobs of type K, and C is a predetermined scale factor.

2. A method in accordance with claim 1 further comprising

repeating at regular intevals said determining step and said adjusting step.

3. A method in accordance with claim 1 wherein said maintianing step further comprises

incrementing said number, J_k, by one as each job of type k is requested and

decremeting said number, J_k, by one as each job of type k is completed.

4. An electrical system comprising:

variable-frequency clock means for transmitting a clock signal of variable frequency,

electrical means for performing processing jobs at an operating frequency defined by the frequency of said clock signal, said electrical means comprising a processor

means for repetitively determining the processing load of said electrical means based on all requested but uncompleted processing jobs and

means coupled to said variable-frequency clock means for adjusting the frequency of said clock signal basedon the processing load determined by said determining means, wherein

each of said processing jobs is one of n types, n being a positive integer greater than one, said system further comprises

means for maintaining data that define a number, J_K, of jobs of type K, for each integer K from one through n, to be performed by said system,

wherein said determining means further comprises means for reading said data

wherein said adjusting means further comprises means for calculating an operating frequency, f, according to ##EQU3## wherein f₀ is a minimum frequency, A_K is a weighting factor associated with jobs of type K, and C is a predetermined scale factor and

means for transmitting a digital word defined by said calculated operating frequency, f, to said variable-frequency clock means,

wherein said variable-frequency clock means is responsive to said digital word for generating said clock signal at said calculating operating frequency, f.

5. An electrical system in accordance with claim 4 wherein said variable-frequency clock means further comprises

converter means for generating an analog control voltage in response to said digital word and

oscillator means coupled to said converter means for generating said clock signal at a frequncy defined by said analog control voltage.

6. An electrical system in accordance with claim 5 further comprising

low-pass filter means interposed between said converter means and said oscillato means for filtering said analog control voltage.

7. An electrical system in accordance with claim 4 wherein said electrical means is implemented in metal-oxide-silicon technology.