Method of manufacturing an electrically variable piezoelectric hybrid capacitor

• US 4,675,960 A
• Filed: 12/30/1985
• Issued: 06/30/1987
• Est. Priority Date: 12/30/1985
• Status: Expired due to Term

• Current Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Higgins, Robert J. Jr.
• Primary Examiner(s): Hall, Carl E.
• Application Number:
  US06/814,868
• Time in Patent Office: 547 Days
• Field of Search: 29/25.35, 29/25.41, 310/338, 361/277, 361/281, 361/283
• US Class Current: 29/25.35
• CPC Class Codes: H01G 5/16 using variation of distance between electrodes
• CPC Class Codes: H10N 30/00 Piezoelectric or electrostrictive devices integrated devices or assemblies of multiple devices H10N39/00
• CPC Class Codes: Y10T 29/42 Piezoelectric device making
• CPC Class Codes: Y10T 29/43 Electric condenser making

Abstract

An electrically variable three terminal monomorphic piezoelectric capacitor is manufactured with thick or thin film hybrid microelectronic circuit technology. A first capacitor plate and a ridge, which substantially surrounds and extends above the first capacitor plate, are formed on the surface of a substrate. A monomorphic piezoelectric wafer having a control plate and a second capacitor plate on opposing surfaces is bonded to the upper surface of the ridge. During bonding, a force is applied at the center of the wafer which fixes a permanent bow in the wafer in the direction of the first capacitor plate. A four terminal monomorphic embodiment and three and four terminal bimorphic embodiments are also described.

Claims

1. A method of constructing an electrically variable piezoelectric hybrid microelectronic circuit capacitor, comprising the steps of:

forming a first capacitor plate on a surface of a substrate;

forming a ridge on said surface of said substrate by a hybrid microelectronic circuit manufacturing process, whereby the upper surface of said ridge is positioned a predetermined distance above said first capacitor plate;

forming a second capacitor plate on a first surface of a piezoelectric wafer;

forming a first control plate on a second surface of said piezoelectric wafer;

placing said piezoelectric wafer on said ridge;

applying a force substantially at the center of said piezoelectric wafer, thereby causing said piezoelectric wafer to arch; and

bonding said piezoelectric wafer to said ridge whereby said piezoelectric wafer maintains an arched shape when said force is removed.

2. The method of claim 1, further comprising the step of applying a dielectric material over the surface of one of said capacitor plates.

3. The method of claim 1, wherein said step of forming said ridge includes the step of tooling said ridge in said substrate.

4. The method of claim 1, wherein said hybrid microelectronic circuit manufacturing process includes sputtering said ridge on said substrate.

5. The method of claim 1, wherein said hybrid microelectronic circuit manufacturing process includes vacuum depositing said ridge on said substrate.

6. The method of claim 1, wherein said hybrid microelectronic circuit manufacturing process includes electroplating said ridge on said substrate.

7. The method of claim 1, wherein said hybrid microelectronic circuit manufacturing process includes screening said ridge on said substrate.

8. The method of claim 1, wherein said hybrid microelectronic circuit manufacturing process includes bonding said ridge to said substrate, wherein said ridge is a preformed glass ring.

9. The method of claim 1, further comprising the step of forming a second control plate on said first surface of said piezoelectric wafer.