Method for planarizing semiconductor substrates

• US 4,676,868 A
• Filed: 04/23/1986
• Issued: 06/30/1987
• Est. Priority Date: 04/23/1986
• Status: Expired due to Term

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Inventors: Riley, Paul E., Bayer, Paul, Ray, Alan B.
• Primary Examiner(s): Powell, William A.
• Application Number:
  US06/855,207
• Time in Patent Office: 433 Days
• Field of Search: 156/643, 156/646, 156/652, 156/653, 156/655, 156/657, 156/659.1, 156/662, 156/651, 156/668, 29/576 W, 29/591, 427/38, 427/39, 427/88, 427/89, 427/90, 427/93, 204/192 E, 357/65, 357/71, 252/79.1
• US Class Current: 438/697
• CPC Class Codes: H01L 21/31055 the removal being a chemical etching step, e.g. dry etching etching per se H01L21/311
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/76819 Smoothing of the dielectric planarisation of insulating materials per se H01L21/31051

Abstract

A method for planarizing an insulating layer overlying an irregular topographic substrate, e.g., a conductive layer, is planarized by use of a sacrificial planarization layer. The planarization layer is removed using an oxygen-containing plasma generated in a parallel electrode reactor operating at a low excitation frequency and high pressure. Once the interface between the planarization layer and the conductive layer is reached, a second plasma with a reduced oxygen content is employed to avoid overetching the planarization layer. It has been observed that oxidizing species liberated during the etching of the insulating layer, typically silicon dioxide, contribute to the oxidation and hence removal of the planarization layer. The process may be monitored by observing the spectral emissions from species generated or consumed during planarization or by changes in the optical interference pattern, allowing termination of the etch at the proper time to avoid over-etching and under-etching of the insulating layer.

Claims

1. A method for planarizing an insulating layer and exposing underlying topographic features, said method comprising:

applying a planarization layer over the insulating layer to thickness sufficient to form a substantially level surface;

uniformly etching the planarization layer with a first plasma down to about the interface between the planarization layer and the insulating layer; and

uniformly etching the remaining planarization layer and insulating layer with a second plasma selected to preferentially etch the insulating layer.

2. A method as in claim 1, wherein a conductive layer at least partly defines the underlying topographic features.

3. A method as in claim 2, wherein the planarization layer is applied by spinning a liquid photoresist or planarizing coating.

4. A method as in claim 3, wherein the thickness of the photoresist is at least 10,000 Å

.

5. A method as in claim 1, wherein the planarization layer is etched in an oxygen-containing plasma.

6. A method as in claim 5, wherein the etching of the planarization layer is performed in a parallel electrode reactor at low frequency under high pressure.

7. A method as in claim 6, wherein the frequency is below about 1 MHz and the pressure is above about 1 Torr.

8. A method as in claim 1, wherein the etching of the combined planarization layer and insulating layer is performed in a plasma having a reduced oxygen content relative to the first plasma.

9. A method as in claim 8, wherein the plasma has no extrinsically introduced oxygen.

10. A method as in claim 1, wherein the first plasma contains oxygen and the second plasma is substantially free from extrinsically introduced oxygen but contains a halocarbon or fluorine rich etchant.

11. A method as in claim 8, wherein the etching of the combined planarization layer and insulating layer is performed in a parallel electrode reactor at low frequency under high pressure.

12. A method as in claim 11, wherein the frequency is below about 1 MHz and the pressure is above about 1 Torr.

13. A method for planarizing a silicon dioxide insulating layer and exposing underlying topographic features, said method comprising:

applying an organic planarization layer over the insulating layer to a thickness sufficient to form a substantially level surface;

etching the planarization layer with an oxygen plasma down to about the interface between the planarization layer and the insulating layer; and

etching the combined planarization layer and insulating layer with a reduced oxygen plasma generated in a low frequency, high pressure parallel electrode reactor, whereby the insulating layer is preferentially etched relative to the planarizing layer.

14. A method as in claim 13, wherein a conductive layer at least partly defines the underlying topographic features.

15. A method as in claim 14, wherein the conductive layer has a thickness over 2000 Å

and the thickness of the planarization layer is at least 20,000 Å

above the metallization layer.

16. A method as in claim 15, wherein the first plasma contains oxygen and etching of the planarization layer is performed in a parallel electrode reactor at low frequency under high pressure, whereby etching rates above 20,000 Å

per minute may be achieved with high uniformity.

17. A method as in claim 16, wherein the frequency is below about 1 MHz and the pressure is above about 1 Torr.

18. A method as in claim 14, wherein the second plasma is substantially free from extrinsically introduced oxygen.

19. A method as in claim 18 wherein the frequency is below about 1 MHz and the pressure is above about 1 Torr.

20. An improved method for planarizing an insulating layer on a semiconductor substrate, said method being of the type wherein an organic polymeric planarization layer is applied over the insulating layer and thereafter both the planarizing layer and the insulating layer are etched to leave a substantially planar surface, said improvement comprising etching the planarization and insulating layers with a low frequency, high pressure plasma in a parallel electrode reactor, wherein the frequency is below about 1 MHz and the pressure is above about 1 Torr.

21. An improved method as in claim 20, wherein the planarization layer is initially etched with an oxygen-containing plasma at a rate exceeding 20,000 Å

per minute until the interface between the insulating and planarization layers is reached.

22. An improved method as in claim 21, wherein the combined planarization and insulating layer is etched with a halocarbon or fluorine rich etchant substantially free from extrinsically introduced oxygen so that the insulating layer is preferentially etched.

23. An improved method as in claim 22, wherein the halocarbon etchant is CF₄.

24. An improved method as in claim 21, wherein the power density of the reactor is maintained in the range from about 1 to 5 watts/cm².

25. An improved method as in claim 20, wherein the planarizing layer is composed of a photoresist.

26. An improved method as in claim 20, wherein a single wafer is etched in the reactor and the endpoint of the etch is determined by observing spectral emissions in the plasma from species generated or consumed during the etch or by changes in the optical interference pattern by laser interferometry.