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Semiconductor memory device

  • US 4,677,455 A
  • Filed: 07/01/1986
  • Issued: 06/30/1987
  • Est. Priority Date: 03/30/1982
  • Status: Expired due to Fees
First Claim
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1. A semiconductor memory device, comprising:

  • a semiconductor substrate having a first conductivity type;

    a pair of first and second word lines;

    a word line drive circuit operatively connected to said first word line;

    a hold current source operatively connected to said second word line;

    a pair of bit lines forming a cross point with said pair of word lines;

    a buried layer having a second conductivity type, opposite to said first conductivity type, formed on said semiconductor substrate and used as said first word line;

    first isolation regions formed above and slightly penetrating into said buried layer;

    second isolation regions penetrating through said buried layer and slightly into said semiconductor substrate; and

    a memory cell arranged at the cross point of said pair of word lines and said pair of bit lines, said memory cell comprising a pair of cross-coupled PNPN elements forming a flip-flop, said pair of PNPN elements connected in parallel between said first and second word lines, each said PNPN element being laterally surrounded by said first isolation regions and comprising;

    a first region, having said first conductivity type, formed on said buried layer with only a PN junction therebetween;

    a second region, having said second conductivity type, formed on said first region and connected to said first region in said PNPN element paired therewith;

    a third region, having said first conductivity type, formed on said second region; and

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