Power control network for multiple digital modules

• US 4,677,566 A
• Filed: 10/18/1984
• Issued: 06/30/1987
• Est. Priority Date: 10/18/1984
• Status: Expired due to Term

• Current Assignee: Unisys Corporation
• Original Assignee: Burroughs Corp (Unisys Corporation)
• Inventors: Sharp, Larry D., Whittaker, Bruce E., Jeppesen, James H. III
• Primary Examiner(s): Lall, Parshotam S.
• Assistant Examiner(s): Laibowitz, Danielle
• Application Number:
  US06/662,477
• Time in Patent Office: 985 Days
• Field of Search: 364/492, 364/200, 364/900
• US Class Current: 700/295
• CPC Class Codes: G06F 1/3209 Monitoring remote activity, e.g. over telephone lines or network connections
• CPC Class Codes: G06F 1/325 Power saving in peripheral device
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

A power network control system has a plurality of digital modules interconnected. A master logic unit in the network communicates with a specialized protocol to slave logic units in each module. The slave logic unit can instruct a power control circuit to turn-off or turn-on various power supply modules in addition to adjusting a power module in steps of plus or minus fixed percentage amounts.

Claims

1. In a system of interconnected modules which include at least one processer module, at least one I/O module, and at least one memory module, and wherein each module includes internal power control switching means and internal power supply means, a power control network for controlling an on/off power status or condition of any selected module, said power control network comprising:

(a) master logic power unit means for sensing the power status of each of said modules and for transmitting control instructions for regulating the on/off power status of a selected module, or modules, or all of said modules; and

(b) slave logic power unit means for receiving said control instructions and for regulating the power status of each of said modules, said slave logic power unit means including;

(b1) a plurality of slave logic units each of which is connected to said master logic unit means and wherein each of said modules is provided with an individual slave unit residing therein, each of said slave logic units including;

(b1a) means to sense the power status of the said internal power supply means residing in the same module as the said slave logic unit;

(b2) said power control switching means operating under control instructions from said master unit, via said slave unit, for switching the power on or off in the module in which said slave unit resides, and wherein said power control switching means includes;

(b2a) means to cause said internal power supply means to have its output increased or decreased by a fixed percent amount.

2. The power control network of claim 1, wherein said master logic power unit means includes:

(a) master microprocessor means for executing program instructions for powering up or powering down the said internal power supply means in any selected module, and including;

(a1) means to transmit instructions to selected ones of said slave logic units for controlling said power control switching mean;

(b) memory means connected to said master microprocessor means for program storage and data buffering;

(c) interface means, connected to said microprocessor means, for providing data transfers to/from each of said slave logic units; and

(d) time-of-day means for providing time signals to said master microprocessor means to enable unattended system power up and halt-load, and to record the time of any unit failure.

3. The power control network of claim 1, wherein each of said slave logic units includes:

(a) slave microprocessor means for receiving and executing instructions from said master logic power unit means and for transmitting power status information data to said master logic power unit means, said slave microprocessor means including;

(a1) means for executing instructions for raising/lowering the voltage of any selected local unit of said internal power supply means;

(b) address switch means for setting up a unique address to identify each slave logic unit, said switch means connected to said slave microprocessor means;

(c) communication transfer circuitry for transferring instructions and data between said slave microprocessor means and said master logic power unit means; and

(d) interface circuitry for connecting said slave microprocessor means to said power control switching means in said modules in order to control the on/off condition of power in said each of said modules.

4. The power control network of claim 3, wherein each of said slave logic units include:

(a) memory clock select circuitry connected to receive clock signals from said slave microprocessor means and to transmit a clock select signal to said memory module.

5. In a system of interconnected modules which include at least one processor module, at least one I/O module, and at least one memory module, a power control network for controlling an on/off power status or condition of any selected module, said power control network comprising:

(a) a network master power logic unit having output connections to a plurality of slave power logic units wherein at least one slave logic unit is located in each of said processor modules, said I/O module and said memory module units, and wherein;

(b) each of said plurality of power slave logic units include;

(b1) slave microprocessor means for receiving and executing instructions from said master logic unit and for transmitting power status data to said master power logic unit;

(b2) address switch means for setting up a unique address to identify each slave power logic unit, said address switch means connected to said slave microprocessor means;

(b3) memory cloc select circuitry connected to said memory module to select which processor module will supply clock select signals to said memory module;

(B4) interface circuitry for connecting said slave microprocessor means to an associated power control switching means in each of said modules in order to control the conditions of power in each of said modules;

(b5) communication transfer circuitry for transferring instructions and data between said slave microprocessor means and saiid master power logic unit;

(c) a plurality of power control switching means in each of said modules, wherein each power control switching means includes;

(c1) means to receive instructions from its slave logic unit for setting up a power-on or power-off status condition in the particular module wherein said power control switching means resides;

(c2) means to receive "margin" instructions from its local slave logic unit to increasedecrease the voltage output of a selected local power supply; and

(d) a plurality of local power supplies connected to a local AC power source located in each module and wherein the power status of each supply and each AC source is controlled by said power control switching means.