Distributed trellis encoder

• US 4,677,625 A
• Filed: 03/01/1985
• Issued: 06/30/1987
• Est. Priority Date: 03/01/1985
• Status: Expired due to Term

• Current Assignee: Rembrandt Technologies, LP (Rembrandt IP Management, LLC)
• Original Assignee: Paradyne Corporation (Dasan Networks Incorporated)
• Inventors: Bremer, Gordon, Betts, William L., Martinez, Kenneth
• Primary Examiner(s): NOT, DEFINED
• Application Number:
  US06/707,084
• Time in Patent Office: 851 Days
• Field of Search: 340/347 DD, 371/43-45, 371/2, 360/39-42, 375/25, 375/34, 375/39
• US Class Current: 714/792
• CPC Class Codes: H03M 13/25 Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] modulation codes H03M13/31
• CPC Class Codes: H03M 13/33 Synchronisation based on error coding or decoding

Abstract

In the transmitter of a data communication system using QAM, a plurality of trellis coders with delay units are used for forward error correction. The output of each encoder is modulated using QAM to generate sequential baud signal elements. The redundant data bits generated are distributed between several non-consecutive bauds. Likewise, at the receiver a plurality of distributed convolutional decoders are utilized to decode the received signal element. The distributed trellis decoder is self-synchronizing.

Claims

1. A data transmission section for a modem coupled to a channel for sending data signals comprising:

1. A plurality of trellis encoders, each trellis encoder having an input for receiving n plain text bits, each encoder being provided to interleave bits received by the encoder during a first baud period with bits received during more than two previous baud periods to generate n trellis encoded bits, k, being larger than one;

in a single baud period, each trellis encoder having means for delaying at least some of said n plain text bits so that they may be outputted and combined with bits outputted from one or more other trellis encoders during single baud periods;

2. encoder activating means for selectively activating only one of said trellis encoders for one baud period in a preselected sequence whereby bits received during a baud period i are interleaved with bits received during a baud period i-k;

3. signal encoding means for converting encoded bits into signals suitable for transmission over said channel; and

4. transmitter switching means for feeding n plain text bits per baud period to the activated trellis encoder and for sending the encoded bits from the activated trellis encoder to the signal encoding means.

2. A receiver section for a modem receiving data signals from a channel, said signals having been trellis encoded by interleaving bits corresponding to a baud period i with bits corresponding to a baud period i-k, k being larger than two, and having:

1. a demodulator and a decoder connected to the output of said demodulator for converting analog data signals from said channel into multiple series of bits, each series of bits substantially corresponding to a point of said analog data signal'"'"'s preselected signal constellation;

2. k trellis decoders, each trellis decoder having an input from said decoder for receiving series of bits from said decoder and generating n bits of plain text bits corresponding to n bits received at least during two previous baud periods;

3. decoder activating means for activating only one of said trellis decoders during one baud period in another predetermined sequence; and

4. receiver switching means for feeding n encoded bits to the activated decoder and for collecting n plain text bits from the activated decoder.

3. A method of transmitting a plurality of input data bits over a channel by quadrature amplitude modulator comprising:

providing a plurality of trellis encoders, each encoder using an identical scheme to interleave bits received during a first baud period with bits received during more than two earlier baud periods preceding said first baud period to generate output bits;

activating each of said trellis encoders in a preselected order for a baud period;

feeding bits which occur during a single baud period to only one of said plurality of trellis encoders;

delaying at least some of said bits in said one trellis encoder during a single baud period;

combining bits which have been outputted from said one trellis encoder with bits which have been outputted from one or more different trellis encoders for transmission during a single baud period; and

quadrature amplitude modulating output bits of each activated trellis encoder.

11. The method of claim 3 further comprising providing a plurality of trellis decoders for sequentially decoding transmitted signals, each trellis decoder being activated sequentially for a baud period for deinterleaving said signals.

4. A system for transmitting data signals over a data channel comprising:

a. a data transmission section coupled to said channel for sending data signals and having;

1. A plurality of trellis encoders, each trellis encoder having an input for receiving n plain text bits each encoder being provided to combine bits received by the encoder during more than two previous baud periods with bits received during a previous baud period to generate n trellis encoded bits in a single baud period, each trellis encoder having means for delaying at least some of said n plain text bits so that they can be outputted and combined with bits outputted from one or more other trellis encoders during single baud periods;

2. encoder activating means for selectively activating only one of said trellis encoders for one baud period in a preselected sequence;

3. signal encoding means for converting encoded bits into signals suitable for transmission over said channel; and

4. transmitter switching means for feeding n plain text bits per baud period to the activated trellis encoder and for sending the encoded bits from the activated trellis encoder to the signal encoding means; and

b. a receiver section for receiving data signals from said channel, and having;

1. a demodulator and a decoder connected to the output of said demodulator for converting analog data signals from said channel into multiple series of bits, each series of bits substantially corresponding to a point of said analog data signal'"'"'s preselected signal constellation of;

2. a plurality of trellis decoders equal in number to the trellis encoders, each decoder generating n bits of plain text bits corresponding to n bits received by the encoder during a baud period and n bits received at least during a previous baud period;

3. decoder activating means for activating only one of said trellis decoders during one baud period in another predetermined sequence; and

4. receiver switching means for feeding n bits to the activated decoder and for collecting n plain text bits from the activated decoder.

5. The system of claim 4 wherein said transmitter switching means comprises a first transmitter switch for providing input bits to the activated trellis encoder, and a second transmitter switch for providing encoded bits from the activated trellis encoder to the signal encoding means.

6. The system of claim 5 wherein said signal encoding means comprises a quadrature amplitude modulator.

7. The system of claim 6 wherein said signal decoding means comprises a quadrature amplitude demodulator.

8. The system of claim 7 wherein there are k trellis encoders each trellis encoders including several delay elements for combining the bits received during said one baud periods with bits received during several preceding baud periods each preceding baud period being separated from the next baud period by (k-1) D seconds where D is the duration of a period.

9. The system of claim 7 wherein said receiver switching means comprises a first receiver switch for feeding encoded bits to the activated decoders and a second receiver switch for collecting plain text bits from the activated decoders.

10. The system of claim 7 wherein each period has a time duration of D seconds and each encoder includes a delay element for delaying bits received during a baud period by D seconds.