Computer-generated image system to display translucent features with anti-aliasing
First Claim
1. In a computer image generator having geometric processor means to prioritize faces of images to be displayed and for providing predetermined intensity information for said faces, having at least one video processor means including memory means to store temporarily information on each point to be displayed, and having display means to produce a visual representation of said images to be displayed, said video processor means comprising:
- integrator circuit means connected to receive information from said geometric processor means on the priority and the intensity assigned to each face of images to be displayed;
skip-over logic circuit means connected to receive information from said integrator circuit means to identify any areas in the faces of images to be displayed not requiring further intensity modification, and separating such identified areas for temporary storage;
translucency update circuit means connected to receive information from said skip-over logic circuit means to identify those areas requiring further intensity modification in accordance with an assigned priority, the translucency update circuit means including;
means to separate each area that requires further intensity modification into its own path and for modifying the intensity of each area that is separated in accordance with the relationship;
##EQU3## where;
AT=Average Translucency,A=Area inside brackets,N=current face data value,P=previous face data value,&
=the logical AND,TM=Translucency value,P=complement of P,N=complement of N;
means to recombine the informationn from each path after intensity modification to form a combined signal according to the relationship;
space="preserve" listing-type="equation">F=A[N&
P]×
TM×
Q+A[N&
P]×
TM×
Q where;
F=the Resulting Intensity,A=a fractional area,N=the current intensity,P=the previous intensity,TM=data stored in memory,&
=a logical AND value,Q=the opacity data value,P=the complement of P;
andcircuit means to connect said combined signal from said translucency update circuit means to said display means.
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Accused Products
Abstract
A computer-generated image system that is described in the Disclosure has a videoprocessor circuit with an integrator circuit to assign a predetermined identification to each edge of each face of any image that is to be displayed. Also, it has a "skip-over logic" circuit to identify any area in the face of any image to be displayed that requires no further intensity modification.
Perhaps a key to the success of this arrangement in accordance with the described invention is its provision of a signal modifier circuit to apply a pre-determined intensity modification factor to any area not identified by the skip-over logic circuit. By this arrangement, any area that is to be displayed behind a translucent area will be visible although at a reduced intensity.
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Citations
4 Claims
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1. In a computer image generator having geometric processor means to prioritize faces of images to be displayed and for providing predetermined intensity information for said faces, having at least one video processor means including memory means to store temporarily information on each point to be displayed, and having display means to produce a visual representation of said images to be displayed, said video processor means comprising:
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integrator circuit means connected to receive information from said geometric processor means on the priority and the intensity assigned to each face of images to be displayed; skip-over logic circuit means connected to receive information from said integrator circuit means to identify any areas in the faces of images to be displayed not requiring further intensity modification, and separating such identified areas for temporary storage; translucency update circuit means connected to receive information from said skip-over logic circuit means to identify those areas requiring further intensity modification in accordance with an assigned priority, the translucency update circuit means including; means to separate each area that requires further intensity modification into its own path and for modifying the intensity of each area that is separated in accordance with the relationship;
##EQU3## where;
AT=Average Translucency,A=Area inside brackets, N=current face data value, P=previous face data value, &
=the logical AND,TM=Translucency value, P=complement of P, N=complement of N; means to recombine the informationn from each path after intensity modification to form a combined signal according to the relationship;
space="preserve" listing-type="equation">F=A[N&
P]×
TM×
Q+A[N&
P]×
TM×
Qwhere; F=the Resulting Intensity, A=a fractional area, N=the current intensity, P=the previous intensity, TM=data stored in memory, &
=a logical AND value,Q=the opacity data value, P=the complement of P; and circuit means to connect said combined signal from said translucency update circuit means to said display means. - View Dependent Claims (4)
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2. In a video processor for providing, from input faces, an image described by pixel intensities;
- said video processor comprising a vertical integrator, skip-over logic, a bed-of-nails having a bed-of-nails memory, a spatial filter, a video mixer, and a translucency effects system, said translucency effects system comprising;
a translucency memory for storing an average translucency parameter associated with each pixel of the image; and a translucency update circuit for updating the translucency memory and for modifying the intensities of image pixels in accordance with translucency effects according to the relationship;
##EQU4## where;
AT=Average Translucency,N=the Bed-of-Nails data, current face, P=the Bed-of-Nails data, previous face, A=the "Nail" Area inside the bracket, &
=a logical AND of data N and P,TM1=the Translucency data in Memory 1, TM2=the Translucency data in Memory 2, T=Translucency data value, N=the complement of N, P=the complement of P; said translucency update circuit is connected so that it receives, as inputs for each pixel process from each face, translucency and opacity values output by the spatial filter;
the area of the visible portion of the pixel contribution for the current face, the area of the occluded portion of the pixel not covered by the current face, and the area of the pixel covered by both previous and current faces, said areas as output by the spatial filter; and
the translucency parameter as output by the translucency memory;
said translucency update circuit subsequently updates the average translucency parameter, outputing it back to the translucency memory, and also outputs an intensity modification factor to the video mixer according to the relationship;
space="preserve" listing-type="equation">F=A[N&
- said video processor comprising a vertical integrator, skip-over logic, a bed-of-nails having a bed-of-nails memory, a spatial filter, a video mixer, and a translucency effects system, said translucency effects system comprising;
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3. P]×
- TM2×
Q+A[N&
P]×
TM1×
Qwhere; F=the Resulting Intensity, A=a fractional area, N=the current intensity, P=the previous intensity, TM2=data stored in memory 2, TM1=data in memory 1, Q=the opacity data value, P=the complement of P, for modifying the intensity contribution for the effects of translucency.
- TM2×
Specification