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Integrated dual charge pump power supply and RS-232 transmitter/receiver

  • US 4,679,134 A
  • Filed: 06/25/1986
  • Issued: 07/07/1987
  • Est. Priority Date: 10/01/1985
  • Status: Expired due to Term
First Claim
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1. A circuit, integrable on a single piece of semiconductor substrate material, for providing a bipolar voltage output at substantially double the voltage of a unipolar voltage input source, including:

  • first and second voltage input terminals,first and second positive transfer capacitor connection terminals,a first set of MOS semiconductor switches for selectively connecting said first voltage input terminal to said first and second positive transfer capacitor connection terminal and said second voltage input terminal to said second positive transfer capacitor connection terminal,first and second positive reservoir capacitor connection terminals,a second set of MOS semiconductor switches for selectively connecting said first voltage input terminal to said second positive transfer capacitor connection terminal and for selectively connecting said second voltage input terminal to said first positive reservoir capacitor connection terminal and said first positive transfer capacitor connection terminal to said second positive reservoir capacitor connection terminal,first and second negative transfer capacitor connection terminals,a third set of MOS semiconductor switches for selectively connecting said first positive reservoir capacitor connection terminal to said first negative transfer capacitor connection terminal and said second positive reservoir capacitor connection terminal to said second negative transfer capacitor connection terminal,first and second negative reservoir capacitor connection terminals, said first negative reservoir capacitor connection terminal connected to said first positive reservoir capacitor connection terminal,a fourth set of MOS semiconductor switches for selectively connecting said first negative transfer capacitor connection terminal to said second negative reservoir capacitor connection terminal and second negative transfer capacitor connection terminal to said first negative reservoir capacitor connection terminal,selection circuitry for selectively activating said first, second, third and fourth sets of MOS semiconductor switches,means for clamping said second positive reservoir capacitor terminal to a voltage no more negative than a voltage approximately equal to the voltage appearing on said first voltage input terminal,means for clamping said second negative reservoir capacitor to a voltage no more positive than a voltage approximately equal to the voltage appearing on said second voltage input terminal,means for inhibiting latch-up of forward biased four layer devices created as a result of layout of said circuit on a single piece of semiconductor substrate material,at least one RS-232 transmitter circuit, disposed in said semiconductor substrate material, having positive, negative and ground potential power conductors connected to said second positive reservoir capacitor terminal, said second negative reservoir capacitor connection terminal, and said first positive reservoir capacitor terminal, respectively, a data input connection terminal connected to said transmitter circuit for providing data to said transmitter, and a data output terminal connection for providing an output from said transmitter.

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