Integrated circuit chip carrier

• US 4,682,270 A
• Filed: 05/16/1985
• Issued: 07/21/1987
• Est. Priority Date: 05/18/1984
• Status: Expired due to Fees

• Current Assignee: British Telecommunications PLC (BT Group PLC)
• Original Assignee: British Telecommunications PLC (BT Group PLC)
• Inventors: Taylor, Kenneth, Whitehead, Graham K.
• Primary Examiner(s): Grimley, Arthur T.
• Assistant Examiner(s): NOT, DEFINED
• Application Number:
  US06/734,650
• Time in Patent Office: 796 Days
• Field of Search: 357/74, 357/80, 361/392, 361/395, 361/399-401, 361/408, 361/413, 174/525 FP
• US Class Current: 361/764
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/057 the leads being parallel to the base
• CPC Class Codes: H01L 23/13 characterised by the shape
• CPC Class Codes: H01L 23/145 Organic substrates, e.g. plastic
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 23/49805 the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
• CPC Class Codes: H01L 23/538 the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates H05K takes precedence; manufacture or treatment H01L21/4846 ; mountings per se H01L23/12; materials H01L23/49866
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01039 : Yttrium [Y]
• CPC Class Codes: H01L 2924/01057 : Lanthanum [La]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15165 : Monolayer substrate
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H05K 1/0271 : Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
• CPC Class Codes: H05K 2201/0129 : Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
• CPC Class Codes: H05K 2201/09036 : Recesses or grooves in insulating substrate
• CPC Class Codes: H05K 2201/09118 : Moulded substrate
• CPC Class Codes: H05K 2201/09181 : Notches in edge pads
• CPC Class Codes: H05K 2201/09709 : Staggered pads, lands or terminals; Parallel conductors in different planes
• CPC Class Codes: H05K 2201/10727 : Leadless chip carrier [LCC], e.g. chip-modules for cards
• CPC Class Codes: H05K 2201/10909 : Materials of terminal, e.g. of leads or electrodes of components
• CPC Class Codes: H05K 2203/0723 : Electroplating, e.g. finish plating
• CPC Class Codes: H05K 3/0052 : Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
• CPC Class Codes: H05K 3/242 : characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
• CPC Class Codes: H05K 3/244 : Finish plating of conductors, especially of copper conductors, e.g. for pads or lands selective plating methods H05K3/243; finish plating of conductors made by printing techniques H05K3/246; solder as finish H05K3/3457, e.g. by plating H05K3/3473
• CPC Class Codes: H05K 3/3442 : having edge contacts, e.g. leadless chip capacitors, chip carriers
• CPC Class Codes: H05K 3/403 : Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof H05K3/4092 takes precedence
• CPC Class Codes: H05K 3/42 : Plated through-holes or plated via connections
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

A chip carrier includes a body (1) having a central region and sidewalls (31) connected to the central region by an elastically deformable region (33), in order to reduce thermal strains.

Also for the same reason a heat sink (41) may be attached underneath the carrier below the carrier'"'"'s die attachment site (8) and thermally conductive material (40,42) may connect them together. The heat sink may be used for mechanical anchorage.

The chip carrier may be produced by injection moulding from an aromatic thermoplastic polymer.

A carrier may be moulded with more than one die attachment site or a circuit board with die attachment sites could be moulded, preferably with the die attachment site recessed so that the surface of the die 9 is co-planar with conductive tracks on the board.

Claims

1. A leadless chip carrier comprising:

a body having a die attachment site and a body outer wall portion;

first contact pads;

a peripheral sidewall portion radially outward of said body outer wall portion and having a peripheral inner wall portion and a peripheral outer wall portion, said peripheral sidewall portion laterally spaced from said body outer wall portion and having on an underside second contact pads for attaching, in use, the chip carrier to a circuit board, said peripheral sidewall portion having a predetermined height, the second contact pads being electrically connected to the first contact pads;

a link region, disposed near an upper carrier surface remote from said underside, connecting the peripheral sidewall portion to said body, the link region, the peripheral sidewall portion and said body defining a slot disposed generally about a periphery of said body, the link region having a thickness substantially less than said predetermined height and being an elastically deformable region such that, in use, thermally induced strains of the carrier relative to the circuit board are accommodated by the link region.

2. A chip carrier as claimed in claim 1 in which the sidewall is divided between adjacent second contact pads.

3. A chip carrier as claimed in claim 2 in which adjacent second contact pads are offset.

4. A chip carrier as claimed in claim 1, 2 or 3 in which the body is formed by injection moulding from an aromatic thermoplastic polymer.

5. A chip carrier as claimed in claim 4, in which the aromatic thermoplastic polymer is polyether ether ketone or polyethersulphone or polysulphone or polyetherimide.

6. A chip carrier as claimed in claim 4 in which the die attachment site comprises a relief pattern.

7. A chip carrier as claimed in claim 4 in which the chip carrier is produced in a matrix of injection moulded carriers and separated after moulding.

8. A chip carrier as claimed in any one of claims 1, 2, or 3 in which the die attachment site is recessed into the body of the chip carrier.

9. A chip carrier as claimed in claim 8 having a die mounted on the die attachment site in which the connecting surface of the die is co-planar with the first contact pads.

10. A chip carrier as claimed in any one of claims 1, 2, or 3 including a metallised attachment pad on its underside whereby the carrier may be mounted on the circuit board with the attachment pad and the contact pads soldered to corresponding areas on the circuit board.

11. A chip carrier as claimed in claim 10 in which the die attachment site comprises a region having a higher thermal conductivity than the body and including thermally conductive means extending through the body between the die attachment site and the attachment pad.

12. A leadless chip carrier for protectively housing an integrated circuit chip and for electrically connecting the chip to external circuts on a circuit board, said chip carrier comprising:

a body having an upper and lower surface and including a die attachment site;

first contact pads;

a slot formed in the lower surface of said body and extending through substantially the full thickness thereof, said slot disposed generally about a periphery of the body to define a laterally spaced sidewall connected to the body by a relatively thin connecting region;

second contact pads disposed on said lower surface radially outwardly of the slot;

electrical connections disposed on said connecting region and said sidewall of the carrier for connecting the first and second contact pads;

wherein

the relatively thin connecting region between said sidewall and said body is elastically deformable so that, in use, thermally induced strains of the chip carrier relative to the circuit board are accommodated by the connecting region.

13. A leadless chip carrier as defined in claim 12 wherein the sidewall of the carrier is castelated about its peripheral edge so that adjacent second contact pads are radially offset with respect to each other.

14. A leadless chip carrier as defined in claim 12 wherein the sidewall of the carrier is divided into discrete segments, each of said second contacts being disposed on one of said segments.

15. A leadless chip carrier as defined in claim 12 in which the body is formed by injection molding from an aromatic thermoplastic polymer.

16. A leadless chip carrier as defined in claim 15 in which the aromatic thermoplastic polymer is polyether ketone or polyether sulphone or polysulphone or polyetherimide.

17. A leadless chip carrier as defined in claim 12 in which the chip carrier is produced in a matrix of injection molded carriers and separated after molding.

18. A leadless chip carrier as defined in claim 12 in which the die attachment site is recessed into the body of the chip carrier.

19. A leadless chip carrier as defined in claim 18 and further including a die mounted on the die attachment site, the die having an upper connecting surface which is co-planar with the first contact pads.

20. A leadless chip carrier as defined in claim 18 in which the die attachment site comprises a region having a higher thermal conductivity than the body and including thermally conductive means extending through the body between the die attachment site and the attachment pad.

21. A leadless chip carrier as defined in claim 12 wherein the carrier is provided with a metallized attachment pad on its under side so that the carrier may be mounted on a circuit board with the attachment pad and the second contact pads soldered to corresponding areas on the circuit board.

22. A leadless chip carrier comprising:

a one-piece structure having a central recess for receiving and protectively mounting an integrated circuit die;

said structure having at least one interior wall portion and including at least one pair of spaced-apart sidewalls disposed at an edge of said structure, said spaced-apart sidewalls having a predetermined height and having an outer peripheral wall portion and an inner peripheral wall portion, said inner peripheral wall portion being laterally spaced apart from said interior wall portion of said structure,

an integral thin elastically deformable link portion having a thickness substantially less than said predetermined height, said link portion interconnecting said spaced-apart sidewalls and said interior wall portion of the one piece structure, said link portion being disposed near a first upper carrier surface;

said link portion, said spaced-apart sidewalls and said interior wall portion defining a slot;

plural first conductive pads disposed for electrical connection to an integrated circuit ship mounted in said recess; and

a plurality of second conductive pads disposed on an outermost sidewall and electrically connected along an outside of the outermost sidewall to respective ones of said first pads, said seconds pads being disposed near a second lower carrier surface remote from said link and being disposed for electrical connection to external circuits via said outermost sidewall and its associated link portion so as to reduce thermally induced stresses between the chip carrier and such connected external circuits.

23. A leadless chip carrier as in claim 22 further including a lid element adapted to sealingly enclose said recess.

24. A leadless chip carrier as in claim 22 wherein said pair of spaced-apart outer sidewalls extend about substantially the entire perimeter of said structure.

25. A leadless chip carrier as in claim 22 wherein said pair of spaced-apart outer sidewalls include plural substantially straight segments juxtaposed at angulated corners and wherein the outer most wall includes a through-slot formed therethrough at such corners.

26. A leadless chip carrier as in claim 22 wherein the outermost sidewall of the carrier is castelated about its peripheral edge so that adjacent second contact pads are radially offset with respect to each other.

27. A leadless chip carrier as in claim 22 wherein the outermost sidewall of the carrier is divided into discrete segments, each of said second contacts being disposed on one of said segments.

28. A leadless chip carrier as in claim 22 wherein the structure is formed by injection molding from an aromatic thermoplastic polymer.

29. A leadless chip carrier as in claim 22 further including a die mounted on the die attachment site, the die having an upper connecting surface which is co-planar with the first contact pads.

30. A leadless chip carrier as defined in claim 22 wherein the carrier is provided with a metallized attachment pad on its underside so that the carrier may be mounted on a circuit board with the attachment pad and the second contact pads soldered to corresponding areas on the circuit board.

31. A leadless chip carrier as in claim 22 wherein the die attachment site comprises a region having a higher thermal conductivity than the body and including thermally conductive means extending through the body between the die attachment site and the attachment pad.