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Synchronous data transmission method and device implementing same

  • US 4,682,334 A
  • Filed: 05/20/1985
  • Issued: 07/21/1987
  • Est. Priority Date: 05/23/1984
  • Status: Expired due to Term
First Claim
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1. A synchronous data transmission method employing an MB 1C 1F type code for coding each M bits of binary data to be transmitted into an M+2 bit code word, said method steps of:

  • dividing the binary data to be transmitted into successive blocks of M bits each (where M is an even integer);

    adding to each block a frame bit and a complement bit to form an intermediate word, said frame bit having a value determined in accordance with a parity of each block of M bits;

    determining a word digital sum (WDS) in accordance with the difference between the number of marks (logic

         1) and spaces (logic

         0) of said intermediate word and complement bit;

    determining a running digital sum (RDS) in accordance with the difference between the number of ones and zeros in the data already encoded;

    complementing said intermediate word in accordance with a comparison of the signs of WDS and RDS, while changing the value of said complement bit, if necessary, to indicate whether said intermediate word has been complemented or not; and

    combining said complement bit and said complemented intermediate word to form an output code word to be transmitted having M+2 bits.

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