Switching power supply with automatic power factor correction

• US 4,683,529 A
• Filed: 11/12/1986
• Issued: 07/28/1987
• Est. Priority Date: 11/12/1986
• Status: Expired due to Fees

• Current Assignee: Artesyn North America Incorporated (Artesyn Embedded Technologies, Inc.)
• Original Assignee: Zytec Corporation (Artesyn Embedded Technologies, Inc.)
• Inventors: Bucher, James D. II
• Primary Examiner(s): BEHA JR, WILLIAM
• Application Number:
  US06/929,603
• Time in Patent Office: 258 Days
• Field of Search: 363/44, 363/45, 363/82, 363/89, 363/90, 363/126, 363/21, 363/37, 363/80, 323/222, 323/207, 323/282, 323/299, 323/300, 323/287, 323/288, 315/208, 315/243
• US Class Current: 363/44
• CPC Class Codes: H02M 1/4225 using a non-isolated boost converter
• CPC Class Codes: H02M 1/44 Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
• CPC Class Codes: H02M 3/1563 without using an external clock H02M3/158 takes precedence
• CPC Class Codes: H02M 7/062 Avoiding or suppressing excessive transient voltages or currents
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
• CPC Class Codes: Y02P 80/10 Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Abstract

An off-line switching power supply is described which controls the switching transistor of a fly-back circuit in such a fashion as to achieve better than 0.99 power factor control. The technique used for power factor control allows the switching power supply to operate either from AC or DC sources. The power supply operating from an AC source will accept all international voltages and line frequencies as input to produce a well-regulated DC output. The inductor of the fly-back circuit is maintained at the verge of continuous/discontinuous operation by the power factor control circuit to achieve a high efficiency operation and to minimize switching losses. The power factor correction circuit uses pulsewidth modulation and frequency modulation to control the switching transistor and maintain a high power factor under varying line and load conditions. The power supply also includes integral current limiting protection and RFI filtering for safe and quiet operation.

Claims

1. An off-line switching power supply with automatic power factor correction, comprising:

input connection means for connecting to a power source and for receiving input current;

first rectifier means connected to said input connection means for rectifying said input current and for producing rectified input current;

inductor means for charging and discharging said rectified input current;

switching means connected to said inductor means and to said first rectifier means for placing said inductor means in a first position so that said rectified input current from said first rectifer means is charged in said inductor means and for placing said inductor means in a second position so that said charged rectified input current is discharged from said inductor means;

second rectifier means connected to said inductor means for receiving said discharged rectified input current and for producing rectified inductor current when said inductor means is placed in said second position by said switching means;

capacitor means connected to said second rectifier means for receiving said rectified inductor current, for charging the voltage produced when said inductor means is placed in said second position by said switching means and for discharging regulated direct current and voltage;

output connection means connected to said capacitor means for driving a load with said discharged regulated direct current and voltage;

control means connected to said switching means for alternately placing said inductor means in said first and said second positions, which comprises;

on-time amplifier means connected to said capacitor means for generating an on-time error signal in response to said voltage across said voltage capacitor;

off-time amplifier means connected to said voltage storage means for generating an off-time error signal in response to said voltage across said voltage storage means;

reset detect means connected to said second rectifier means for generating a reset signal when said rectified inductor current through said second rectifier means is approximately zero;

clock circuit means for producing a high frequency clock signal to control said switching means having an on-time interval corresponding to the amount of time said switching means places said inductor means in said first position and having an offtime interval corresponding to the amount of time said switching means places said inductor means in said second position;

the length of said on-time interval controlled by the magnitude of said on-time error signal; and

the length of said off-time interval controlled by said reset signal and said off-time signal so that said reset signal operates to terminate said off-time interval and said off-time error signal operates to extend the off-time interval beyond the termination point set by said reset signal.

2. The device according to claim 1, further including gating means connected to said control means and operable for terminating said on-time interval early when said rectified input current passing through said switching means exceeds a predetermined threshold.

3. The device according to claim 1, further including bias supply means for generating a bias voltage for the components of said control means;

and

under-voltage hold-off means connected to said control means and said bias supply means for preventing said control means from placing said inductor means in said first position in response to said bias supply voltage being below a predetermined threshold.

4. The device according to claim 1, further including minimum frequency means connected to said clock circuit means for ensuring that said on-time signal, said off-time signal, and said reset signal do not produce a clock signal below a predetermined frequency.

5. The device according to claim 1, further including radio frequency interference filter means connected to said input connection means for preventing noise produced by said switching means from being passed back to said power source.

6. The device according to claim 1, wherein said on-time signal operates to decrease said on-time interval in response to an increasing voltage on said voltage storage means;

and

said on-time signal operates to increase said on-time interval in response to a decreasing voltage on said voltage storage means.

7. The device according to claim 1, wherein said off-time signal operates to increase the extension of said off-time interval in response to an increasing voltage on said voltage storage means;

and

said off-time signal operates to decrease the extension of said off-time interval in response to a decreasing voltage on said voltage storage means.

8. A method for controlling power factor in switching power supplies, comprising the steps of:

rectifying line current;

alternately switching an inductor from a first position in parallel with said rectifier such that said inductor stores rectified line current to a second position in series with said rectifier and a load such that said inductor discharges said stored current into said load, said switching including the substeps of;

(a) placing said inductor in said first position to charge said inductor with said rectified line current;

(b) sensing the voltage across said load;

(c) selecting a first time interval in response to the voltage across said load;

(d) placing said inductor in said second position at the end of said first time interval;

(e) sensing the discharge current through said inductor;

(f) selecting a second time interval measured from the end of the first time interval to the point where the discharge current through said inductor is approximately zero;

(g) sensing the voltage across said load;

(h) selecting a second time interval extension in response to the voltage across said load;

(i) placing said inductor in said first position at the end of said second time interval increased by said second time interval extension, if any; and

(j) repeating steps (a) through (i).

9. The method according to claim 8, wherein step (d) further includes the substeps of:

sensing the current through said inductor; and

placing said inductor in said second position before the end of said first time interval if the current through said inductor exceeds a predetermined limit.

10. A switching power supply for producing DC voltage capable of operating from either DC or AC supply lines having a wide variation of voltage and frequency with automatic power factor correction, comprising:

line connection means for connecting to a power grid and for receiving line current;

first rectifier means connected to said line connection means having first and second output terminals for producing rectified line current;

inductor means for charging said rectified line current and for discharging said charged rectified line current having a first inductor terminal connected to said first output terminal of said first rectifier means and having a second inductor terminal;

switching transistor means for operating in a first mode to connect said second inductor terminal to said second output terminal of said first rectifier means so that said inductor means charges said rectified line current and for operating in a second mode to disconnect said second inductor terminal from said second output terminal of said first rectifier means so that said charged rectified line current is discharged from said inductor;

second rectifier means connected to said second inductor terminal for receiving said discharged rectified line current and for producing rectified inductor current;

storage capacitor means having a first terminal connected to said second rectifier means for receiving said rectified inductor current and having a second terminal connected to said second output terminal of said first rectifier means;

first DC output terminal connected to said first terminal of said storage capacitor means and second DC output terminal connected to said second output terminal of said first rectifier means; and

control circuit connected to said switching transistor means, said second terminal of said first rectifier means, said second terminal of said inductor means, and said first terminal of said storage capacitor means for alternately placing said switching means in said first mode and said second mode, which comprises;

on-time amplifier means for sensing the voltage across said storage capacitor and for controlling within preset limits a first time interval responsive to the voltage across said storage capacitor;

reset detect means for sensing when said rectified inductor current through said second rectifier means is approximately zero and for controlling within preset limits a second time interval;

off-time amplifier means for sensing the voltage on said storage capacitor and for extending said second time interval in response to approximately no-load conditions on said DC outputs; and

clock circuit means for producing a high-frequency clock signal comprised of an alternating sequence of said first time interval followed by said second time interval so that said first time interval operates to place said switching transistor means in said first mode and said second time interval operates to place said switching transistor means in said second mode.

11. The device according to claim 10, further including current sense means connected between said switching means and said second terminal of said rectifier means for sensing the amount of rectified line current passing through said switching transistor means;

and

current limit means connected to said current sense means and to said on-time amplifier means for shortening said first time interval in response to current in said current sense means exceeding a preset limit.