Digital terminal address transmitting for CATV

• US 4,684,981 A
• Filed: 11/08/1984
• Issued: 08/04/1987
• Est. Priority Date: 11/09/1983
• Status: Expired due to Term

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Hideshima, Yasuhiro, Toyoshima, Masakatsu, Fujita, Etsumi
• Primary Examiner(s): George, Keith E.
• Application Number:
  US06/669,376
• Time in Patent Office: 999 Days
• Field of Search: 358/86, 455/3, 455/4, 455/5, 455/6
• US Class Current: 725/151
• CPC Class Codes: H04H 20/28 Arrangements for simultaneous broadcast of plural pieces of information
• CPC Class Codes: H04H 20/79 using downlink of the CATV systems, e.g. audio broadcast via CATV network
• CPC Class Codes: H04H 20/88 Stereophonic broadcast systems multiplex system in general H04J

Abstract

Digital signals of up to four different modes are produced for transmission over an unused television channel in an existing cable television transmission line. No more bandwidth is required than that normally required by a single existing television channel. The various modes of digital signals all include synchronizing signals and service bit signals which are used to address any of the numerous terminals at the receiving side to control access to the various modes of digital signals transmitted over the single channel. By controlling the transmission of the modes to have constant time intervals, which can be selected based upon different sampling times, high quality audio signals may be transmitted or/and data channels or monaural audio signals, all of which may be transmitted over the single cable television transmission line.

Claims

1. An address circuit for addressing CATV terminals;

said circuit comprising;

a signal input terminal connected to a CATV transmision line for receiving digital signals that are transmitted through said transmission line and include frame synchronizing signals, word synchronizing signals, service bit signals, and data signals, each of said service bit signals including a plurality of bits forming one of a plurality of possible patterns, said patterns respectively representing at least the start, continuation and end of a counting function;

a frame synchronization detector connected to said signal input terminal for detecting said frame synchronizing signals;

a word synchronization detector connected to said signal input terminal for detecting said word synchronizing signals;

a service bit detector connected to said signal input terminal and said frame synchronization detector for detecting a predetermined service bit signal after each of said frame synchronizing signals has been detected and for identifying said one of said patterns; and

counter means connected to said service bit detector and said word synchronization detector for counting said word synchronizing signals under the control of said service bit detector and for producing an address control signal for selectively addressing said CATV terminals.

2. An address circuit for addressing CATV terminals according to claim 1;

further comprising;

an addressing circuit for storing an address; and

a coincidence circuit jointly responsive to said counter means and said addressing circuit, said coincidence circuit producing an output signal when said address control signal and said stored address coincide.

3. An address circuit for addressing CATV terminals according to claim 2;

further comprising a service bit latch connected to said input terminal and responsive to said output signal to latch a service bit corresponding to the service bit signal then received at said input terminal.

4. An address circuit for addressing CATV terminals according to claim 3, further comprising computer means responsive to said latched service bit for producing system control signals.