Method of manufacturing isolated semiconductor devices

• US 4,685,198 A
• Filed: 07/25/1985
• Issued: 08/11/1987
• Est. Priority Date: 07/25/1985
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Nomura, Noboru, Kawakita, Kenji, Takemoto, Toyoki
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): Quach, T. N.
• Application Number:
  US06/758,962
• Time in Patent Office: 747 Days
• Field of Search: 29/576 W, 29/580, 148/DIG. 50, 148/DIG. 115, 156/647, 156/649, 156/651, 156/644, 357/49
• US Class Current: 438/410
• CPC Class Codes: H01L 21/762 Dielectric regions , e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
• CPC Class Codes: H01L 21/76264 SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
• CPC Class Codes: H01L 21/76281 Lateral isolation by selective oxidation of silicon
• CPC Class Codes: H01L 21/76283 Lateral isolation by refilling of trenches with dielectric material
• CPC Class Codes: H01L 21/763 Polycrystalline semiconductor regions H01L21/76264 takes precedence
• CPC Class Codes: Y10S 148/05 Etch and refill
• CPC Class Codes: Y10S 148/115 Orientation
• CPC Class Codes: Y10S 438/973 Substrate orientation

Abstract

Disclosed is a method of isolating a transistor perfectly by employing a selective oxidation technology (LOCOS technology). More particularly, vertical openings are formed in the surface of {100} silicon substrate, and oxidation resistant films are formed of this surface and in part of the side walls of these openings. In succession, by etching with an etchant having an orientation anisotropy, dents are formed at high precision in the side walls of the openings. By oxidizing using the oxidation resistant film as the mask, an oxide film growing out from a dent in the opening side wall is connected with another oxide film growing out from an adjacent dent. The transistor thus formed in the active region of the silicon electrically isolated from the substrate is small in parasitic capacitance and may be formed into a small size, so that it possesses the features suited to VLSI, that is, high speed, low power consumption, and processability to high density integration.

Claims

1. A method of manufacturing a semiconductor device comprising:

forming a plurality of first openings in a surface of a semiconductor substrate, the crystal plane orientation of said semiconductor substrate being {100};

forming an oxidation resistant film on said surface of said semiconductor substrate and on part of the side walls of the first openings;

forming an etching resistant film on the bottom of said first openings;

exposing said semiconductor substrate at the side walls of said first openings by removing said oxidation resistant film on said part of said side walls;

forming second openings by orientation-dependent etching of the portion of said semiconductor substrate exposed at the side walls of said first openings;

forming oxide films in said second openings using said oxidation resistant film as a mask so that said oxide films are buried into adjacent second openings and are connected to each other to define active regions of said semiconductor device; and

filling the first openings with an insulator material.

2. The method of manufacturing semiconductor device as set forth in claim 1, wherein the second openings are formed by etching using an etchant having its fastest etching speed on the plane of the semiconductor substrate with orientation of {100}.

3. The method of manufacturing semiconductor device as set forth in claim 2, wherein the etchant is potassium hydroxide, mixed solution of ethylenediamine and pyrocatechol, mixed solution of hydrazine and pyrocatechol, or their aqueous solution or mixed solution.

4. A method of manufacturing semiconductor device comprising:

forming a plurality of first opening in a surface of a semiconductor substrate of which the crystal plane orientation is {100};

forming an oxidation resistant film on said surface of said semiconductor substrate and surfaces of said first openings including bottom surfaces thereof;

exposing said semiconductor substrate at the bottom surfaces of said first openings by removing said oxidation resistant film at said bottom surfaces;

forming plural second openings, differing in size from each other, by orientation-dependent etching of the portion of said semiconductor substrate exposed at said first openings;

forming oxide films in said second openings using said oxidation resistant film as a mask so that the oxide films are buried in the adjoining second openings and are connected with each other; and

filling said first openings with an insulator material.

5. The method of manufacturing semiconductor device as set forth in claim 4, wherein said second openings are formed by etching using an etchant having its fastest etching speed on the plane of semiconductor substrate with orientation of {100}.

6. The method of manufacturing a semiconductor device as set forth in claim 4, wherein said first openings are formed with different depths in respective parts of the bottoms thereof in order to form second openings differing in size from each other for the orientation-dependent etching of said semiconductor substrate exposed to said first openings.