Computer system architecture using serial communication

• US 4,686,622 A
• Filed: 12/14/1977
• Issued: 08/11/1987
• Est. Priority Date: 12/28/1970
• Status: Expired due to Term

• Current Assignee: Gilbert P. Hyatt
• Original Assignee: Gilbert P. Hyatt
• Inventors: Hyatt, Gilbert P.
• Primary Examiner(s): Zache, Raulfe B.
• Application Number:
  US05/860,259
• Time in Patent Office: 3,527 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 364/474, 364/751
• US Class Current: 712/32
• CPC Class Codes: B60R 16/0373 Voice control in general G10L
• CPC Class Codes: F21V 23/00 Arrangement of electric circuit elements in or on lighting devices characterised by cooling arrangements F21V29/508
• CPC Class Codes: G01S 15/897 using application of holographic techniques
• CPC Class Codes: G01S 15/8977 using special techniques for image reconstruction, e.g. FFT, geometrical transformations, spatial deconvolution, time deconvolution
• CPC Class Codes: G01S 7/52026 Extracting wanted echo signals Doppler systems G01S15/50; Doppler short range imaging systems G01S15/8979
• CPC Class Codes: G02F 1/13318 Circuits comprising a photodetector
• CPC Class Codes: G03F 9/7049 Technique, e.g. interferometric
• CPC Class Codes: G03F 9/7088 Alignment mark detection, e.g. TTR, TTL, off-axis detection, array detector, video detection
• CPC Class Codes: G04G 99/006 Electronic time-pieces using a microcomputer, e.g. for multi-function clocks
• CPC Class Codes: G05B 19/351 the positional error is used to control continuously the servomotor according to its magnitude
• CPC Class Codes: G05B 19/408 characterised by data handling or data format, e.g. reading, buffering or conversion of data
• CPC Class Codes: G05B 19/4083 Adapting programme, configuration
• CPC Class Codes: G05B 19/4086 Coordinate conversions; Other special calculations
• CPC Class Codes: G05B 19/409 characterised by using manual data input [MDI] or by using control panel, e.g. controlling functions with the panel; characterised by control panel details or by setting parameters G05B19/408, G05B19/4093 take precedence
• CPC Class Codes: G05B 19/4093 characterised by part programming, e.g. entry of geometrical information as taken from a technical drawing, combining this with machining and material information to obtain control information, named part programme, for the NC machine
• CPC Class Codes: G05B 19/414 Structure of the control system, e.g. common controller or multiprocessor systems, interface to servo, programmable interface controller
• CPC Class Codes: G05B 19/4142 characterised by the use of a microprocessor G05B19/4141 takes precedence
• CPC Class Codes: G05B 2219/33182 Uart, serial datatransmission, modem
• CPC Class Codes: G05B 2219/34023 Risc processor
• CPC Class Codes: G05B 2219/34098 Slope fitting, fairing contour, curve fitting, transition
• CPC Class Codes: G05B 2219/34471 : Program memory is inhibited, not accessible as long as power fails
• CPC Class Codes: G05B 2219/34472 : Configure alterable memory as read only, to avoid erasing
• CPC Class Codes: G05B 2219/35262 : Macro instruction, canned cycles, subroutines, subprogram
• CPC Class Codes: G05B 2219/35263 : Using variables, parameters in program, macro, parametrized instruction
• CPC Class Codes: G05B 2219/35373 : Data storage, buffer
• CPC Class Codes: G05B 2219/35431 : Interactive
• CPC Class Codes: G05B 2219/35436 : Means, manual input, input reference, hand wheel
• CPC Class Codes: G05B 2219/35453 : Voice announcement, oral, speech input
• CPC Class Codes: G05B 2219/35472 : Mode selection
• CPC Class Codes: G05B 2219/35554 : Mirror, other conversions
• CPC Class Codes: G05B 2219/36152 : Panel
• CPC Class Codes: G05B 2219/36333 : Selection from standard forms, shapes, partprograms, enter value for variable
• CPC Class Codes: G05B 2219/36366 : Data, read in, distribution
• CPC Class Codes: G05B 2219/36379 : Read in
• CPC Class Codes: G05B 2219/36503 : Adapt program to real coordinates, software orientation
• CPC Class Codes: G05B 2219/36546 : Memory protection, protected fields
• CPC Class Codes: G05B 2219/41021 : Variable gain
• CPC Class Codes: G05B 2219/42237 : Pwm pulse width modulation, pulse to position modulation ppm
• CPC Class Codes: G05B 2219/45214 : Gear cutting
• CPC Class Codes: G05B 2219/45215 : Thread cutting
• CPC Class Codes: G05B 2219/49221 : Control of scale
• CPC Class Codes: G05B 2219/50047 : Positioning, indexing
• CPC Class Codes: G05B 2219/50048 : Jogging
• CPC Class Codes: G05B 2219/50083 : Power loss, measures again loss of power
• CPC Class Codes: G05B 2219/50151 : Orient, translate, align workpiece to fit position assumed in program
• CPC Class Codes: G06F 13/12 : using hardware independent of the central processor, e.g. channel or peripheral processor
• CPC Class Codes: G06F 13/16 : for access to memory bus G06F13/28 takes precedence
• CPC Class Codes: G06J 1/00 : Hybrid computing arrangements digitally-programmed analogue computers G06G7/06
• CPC Class Codes: G07G 1/12 : electronically operated digital data processing aspects G06Q20/00
• CPC Class Codes: G10L 19/00 : Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis in musical instruments G10H
• CPC Class Codes: G11C 11/565 : using capacitive charge storage elements
• CPC Class Codes: G11C 16/3418 : Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3431 : Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
• CPC Class Codes: G11C 19/287 : Organisation of a multiplicity of shift registers
• CPC Class Codes: G11C 19/36 : using multistable semiconductor elements
• CPC Class Codes: G11C 27/00 : Electric analogue stores, e.g. for storing instantaneous values
• CPC Class Codes: G11C 27/04 : Shift registers
• CPC Class Codes: G11C 7/16 : Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters
• CPC Class Codes: Y02P 90/02 : Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

A microcomputer system is provided that facilitates system interaction with an improved interface mechanization. System architecture provides for processing external inputs and generating external outputs under microcomputer program control to enhance capability and flexibility and to reduce special purpose interface circuitry. Use of a microcomputer having an integrated circuit read only memory for program storage, an integrated circuit RAM or scratch pad memory for alterable operand storage, and integrated circuit logic enhances cost, performance, reliability, and other considerations.

Claims

1. A computer system comprising:

operator input means for generating a serial operator input signal;

an integrated circuit computer including

a. an integrated circuit main memory for storing computer instructions,

b. an integrated circuit alterable memory for storing computer operands,

c. integrated circuit processing logic for processing the computer operands stored in said alterable memory in response to the serial operator input signal from said operator input means under control of the computer instructions stored in said main memory,

d. integrated circuit serial display logic for generating a serial display signal in response to the processing of computer operands with said processing logic, and

e. integrated circuit serial machine control logic for generating a serial machine control signal in response to the processing of computer operands with said processing logic;

an operator display for displaying information to an operator in response to the serial display signal from said serial display logic; and

a controller for controlling a machine in response to the serial machine control signal from said serial machine control logic, wherein said controller includes a serial pulse modulated machine control circuit for generating a pulse modulated machine control signal in response to the serial machine control signal from said serial machine control logic and wherein said controller includes means for controlling said machine in response to the pulse modulated machine control signal.

2. A computer system comprising:

operator input means for generating a serial operator input signal;

an integrated circuit computer including

a. an integrated circuit main memory for storing computer instructions,

b. an integrated circuit alterable memory for storing computer operands,

c. integrated circuit processing logic for processing the computer operands stored in said alterable memory in response to the serial operator input signal from said operator input means under control of the computer instructions stored in said main memory,

d. integrated circuit serial display logic for generating a serial display signal in response to the processing of computer operands with said processing logic, and

e. integrated circuit serial machine control logic for generating a serial machine control signal in response to the processing of computer operands with said processing logic;

an operator display for displaying information to an operator in response to the serial display signal from said serial display logic; and

a controller for controlling machine in response to the serial machine control signal from said serial machine control logic, wherein said controller includes a serial activated relay for providing magnetic actuation in response to the serial machine control signal from said serial machine control logic.

3. A computer system comprising:

operator input means for providing a serial operator input signal that is related to an error condition;

an integrated circuit computer including

a. an integrated circuit main memory for storing computer instructions,

b. an integrated circuit alterable memory for storing computer operands,

c. integrated circuit processing logic for processing the computer operands stored in said alterable memory in response to the error condition related serial operator input signal from said operator input means under control of the computer instructions stored in said main memory to compensate at least one of the computer operands stored in said alterable memory for the error condition,

d. integrated circuit serial display logic for generating a serial error display signal in response to an error compensated operand stored in said alterable memory, and

e. integrated circuit serial machine control logic for generating a serial machine control signal in response to the processing of computer operands with said processing logic;

an operator display for displaying an error condition to an operator in response to the serial error display signal generated with said serial display logic; and

a controller for controlling a machine in response to the serial machine control signal for said serial machine control logic.

4. A machine control system comprising:

a plurality of serial input devices for generating serial digital input numbers, said input devices including

(a) a feedback device for generating a machine feedback digital serial input number related to a condition of a machine,

(b) an operator keyboard for generating a keyboard digital serial input number in response to operator activation, and

(c) a serial data link for generating a data link digital serial input number in response to serial digital information communicated with said serial data link;

wherein at least one of said plurality of serial input devices includes a parallel to serial converter for converting a digital parallel input number into a digital serial input number for communication in digital serial input number form to a computer;

a stored program digital computer for processing digital information under control of a stored program, said digital computer including

(a) an integrated circuit main memory for storing a program of computer instructions,

(b) an integrated circuit alterable memory for storing operands,

(c) selection logic for selecting a digital input number from said plurality of serial input devices under control of the program stored in said main memory,

(d) receiving means for receiving the selected digital input number under control of a serial input instruction included in the program stored in said main memory,

(e) storing logic for storing an operand in said alterable memory under control of the program stored in said main memory in response to the selected digital serial input number received with said input logic,

(f) processing logic for processing operands stored in said alterable memory under control of the program stored in said main memory,

(g) machine control output logic for generating a machine control digital serial output number under control of a serial output instruction included in the program stored in said main memory in response to an operand stored in said alterable memory, and

(h) display output logic for generating a display digital serial output number under control of a serial output instruction included in the program stored in said main memory in response to an operand stored in said alterable memory;

a machine controller for controlling a machine in response to the digital output number generated with said machine control output logic, wherein said machine controller includes a serial to parallel converter for generating a digital parallel output number for controlling said machine in response to the digital serial output number from said machine control output logic; and

a display for displaying information to an operator in response to the display digital serial output number generated with said display output logic, wherein said display includes a serial to parallel converter for generating a display digital parallel output number in response to the display digital serial output number generated with said display output logic for displaying of the information in response to the display digital parallel output number.

5. A process control system comprising:

feedback means for generating parallel feedback information related to a controlled process;

a serial data link for communicating the feedback information generated with said feedback means to a data processor in serial digital form;

a stored program data processor for processing digital information under control of a stored program, said data processor including

(a) an integrated circuit main memory for storing a data processor program,

(b) an integrated circuit alterable memory for storing operands,

(c) data link input logic for generating a data link input digital signal in response to the feedback information communicated with said serial data link,

(d) storing logic for storing operands in said alterable memory under control of the program stored in said main memory in response to the data link input digital signal from said data link input logic,

(e) processing logic for processing the operands stored in said alterable memory under control of the program stored in said main memory, and

(f) serial output logic for generating a digital serial process control signal under control of the program stored in said main memory in response to the processing of operands with said processing logic;

serial communicating means for communicating the digital output number from said serial output logic to a process controller in serial digital form; and

a process controller for controlling a process in response to the digital output number communicated from said data processor serial output logic with said serial communicating means.

6. A computer system comprising:

operator input means for generating a serial operator input signal;

an integrated circuit computer including

a. an integrated circuit main memory for storing a program of computer instructions,

b. an integrated circuit alterable memory for storing computer operands,

c. ASR-33 input logic for receiving the serial operator input signal from said operator input means in response to an ASR-33 discrete input instruction stored in said main memory,

d. means for storing a computer operand in said alterable memory under control of the program stored in said main memory in response to the serial operator input signal received from said operator input means with said ASR-33 input logic,

e. integrated circuit processing logic for processing the computer operands stored in said alterable memory under control of the computer instructions stored in said main memory,

f. integrated circuit serial display logic for generating a serial display signal under control of an ASR-33 discrete output instruction stored in said main memory in response to the processing of an operand stored in said alterable memory with said processing logic, and

g. integrated circuit serial machine control logic for generating a serial machine control signal in response to the processing of computer operands with said processing logic;

an operator display for displaying information to an operator in response to the serial display signal from said serial display logic; and

a controller for controlling a machine in response to the serial machine control signal from said serial machine control logic.

7. A computer system comprising:

operator input means for generating a digital parallel serial operator input signal;

a parallel to serial converter for converting the digital parallel operator input signal into a digital serial operator input signal for communication in digital serial input signal form with a computer;

an integrated circuit computer including

a. an integrated circuit main memory for storing computer instructions,

b. an integrated circuit alterable memory for storing computer operands,

c. receiving means for receiving the digital serial operator input signal under control of a serial input instruction stored in said main memory,

d. storing logic for storing an operand in said alterable memory under control of the computer instructions stored in said main memory in response to the digital serial operator input signal received with said receiving means,

e. integrated circuit processing logic for processing the computer operands stored in said alterable memory in response to the serial operator input signal from said operator input means under control of the computer instructions stored in said main memory,

f. integrated circuit serial machine control logic for generating a serial machine control signal under control of a serial output instruction stored in said main memory in response to an operand stored in said alterable memory, and

g. integrated circuit serial display logic for generating a serial display signal under control of a serial output instruction stored in said main memory in response to an operand stored in said alterable memory;

a controller for controlling a machine in response to the serial machine control signal from said serial machine control logic, wherein said controller includes a serial to parallel converter for generating a parallel output signal for controlling said machine in response to the serial machine control signal from said serial machine control logic; and

an operator display for displaying information to an operator in response to the serial display signal from said serial display logic, wherein said operator display includes a serial to parallel converter for generating a parallel display signal in response to the serial display signal generated with said operator display for the displaying of information to an operator in response to the parallel display signal.

8. A machine control system comprising:

a machine turret feedback device for generating a serial turret feedback signal in response to a condition of a machine turret;

an integrated circuit computer including

a. an integrated circuit main memory for storing computer instructions related to control of said machine,

b. an integrated circuit alterable memory for storing computer operands related to control of said machine turret,

c. serial input logic for receiving the serial turret feedback signal from said machine turret feedback device under control of a serial input instruction stored in said main memory,

d. integrated circuit processing logic for processing the machine turret control related computer operands stored in said alterable memory under control of the computer instructions stored in said main memory in response to the serial feedback signal received from said machine turret feedback device with said serial input logic, and

e. integrated circuit serial output logic for generating a serial machine control output signal in response to the processing of the machine control related operands with said processing logic under control of a serial output instruction stored in said main memory; and

a machine controller for controlling said machine in response to the serial machine control output signal.

9. A business computer system comprising:

a typewriter keyboard for generating a serial typewriter input signal related to business information for communication in serial signal form to a computer;

an integrated circuit computer including

a. an integrated circuit main memory for storing computer instructions related to business data processing,

b. an integrated circuit alterable memory for storing computer operands related to business data processing,

c. input logic for receiving the serial typewriter input signal under control of a serial input instruction stored in said main memory,

d. storing logic for storing a typewriter computer operand in said alterable memory under control of the instructions stored in said main memory in response to the serial typewriter input signal received with said input logic,

e. integrated circuit processing logic for processing the business data processing related operands stored in said alterable memory in response to the typewriter computer operand stored in said alterable memory under control of the business data processing related instructions stored in said main memory,

f. integrated circuit serial output logic for generating a serial output signal under control of a serial output instruction stored in said main memory in response to the processing of the business data processing related operands with said processing logic, and

g. display output logic for generating a serial display signal under control of a serial output instruction stored in said main memory in response to the processing of the business data processing related operands with said processing logic;

a typewriter printer for printing business information in response to the serial output signal from said serial output logic; and

a display for displaying information to an operator in response to the serial display signal from said display output logic, wherein said display includes a serial to parallel converter for generating a parallel display signal in response to the serial display signal from said display output logic and means for displaying of the information in response to parallel display signal.

10. A business computer system comprising:

a typewriter keyboard for generating a typewriter input signal in relation to business information;

an integrated circuit computer including

a. an integrated circuit read only memory for storing computer instructions related to business data processing,

b. an integrated circuit alterable memory for storing computer operands related to business data processing,

c. integrated circuit processing logic for processing the business data processing related operands stored in said alterable memory in response to the typewriter input signal from said typewriter under control of the business data processing related instructions stored in said main memory, wherein said processing logic includes

1. direct transfer access means for accessing a direct transfer instruction from said read only memory,

11. direct transfer control means for transferring control to a selected instruction stored in said read only memory in response to the direct transfer instruction accessed with said direct transfer access means, anddirect transfer return means for storing a return address in said alterable memory in response to the direct transfer instruction accessed with said direct transfer access means, and

d. integrated circuit serial output logic for generating a serial output signal in response to the processing of business data processing related operands with said processing logic;

and

a typewriter printer for printing business information in response to the serial output signal from said serial output logic.

12. A business computer system comprising:

a typewriter keyboard for generating a typewriter input signal in relation to business information;

an integrated circuit computer including

a. an integrated circuit read only memory for storing computer instructions related to business data processing,

b. an integrated circuit alterable memory for storing computer operands related to business data processing,

c. integrated circuit processing logic for processing the business data processing related operands stored in said alterable memory in response to the typewriter input signal from said typewriter under control of the business data processing related instructions stored in said main memory, wherein said processing logic includes

1. direct transfer access means for accessing a direct transfer instruction from said read only memory,

13. direct transfer control means for transferring control to a selected instruction stored in said read only memory in response to the direct transfer instruction accessed with said direct transfer access means,direct transfer return means for storing a return address in said alterable memory in response to the direct transfer instruction accessed with said direct transfer access means,indirect transfer access means for accessing an indirect transfer instruction from said read only memory, andindirect transfer control means for transferring control to a selected instruction stored in said read only memory in response to a return address stored in said alterable memory and in response to an indirect transfer instruction accessed with said indirect transfer access means, and

d. integrated circuit serial output logic for generating a serial output signal in response to the processing of business data processing related operands with said processing logic;

and

a typewriter printer for printing business information in response to the serial output signal from said serial output logic.

14. A business computer system comprising:

a typewriter keyboard for generating a typewriter input signal in relation to business information;

an integrated circuit computer including

a. an integrated circuit read only memory for storing computer instructions related to business data processing,

b. an integrated circuit alterable memory for storing computer operands related to business data processing,

c. integrated circuit processing logic for processing the business data processing related operands stored in said alterable memory in response to the typewriter input signal from said typewriter under control of the business data processing related instructions stored in said main memory, wherein said processing logic includes

3. direct transfer access means for accessing a direct transfer instruction from said read only memory,

15. direct transfer control means for transferring control to a selected instruction stored in said read only memory in response to the direct transfer instruction accessed with said direct transfer access means,direct transfer return means for storing a return address in said alterable memory in response to the direct transfer instruction accessed with said direct transfer access means,indirect transfer access means for accessing an indirect transfer instruction from said read only memory,indirect transfer control means for transferring control to a selected instruction stored in said read only memory in response to a return address stored in said alterable memory and in response to an indirect transfer instruction accessed with said indirect transfer access means, and

16. indirect transfer return means for storing a return address in said alterable memory in response to an indirect transfer instruction accessed with said indirect transfer access means, and

d. integrated circuit serial output logic for generating a serial output signal in response to the processing of business data processing related operands with said processing logic;

and

a typewriter printer for printing business information in response to the serial output signal from said serial output logic.

17. A business computer system comprising:

a typewriter keyboard for generating a typewriter input signal in relation to business information;

an integrated circuit computer including

a. an integrated circuit read only memory for storing computer instructions related to business data processing,

b. an integrated circuit alterable memory for storing computer operands related to business data processing,

c. integrated circuit processing logic for processing the business data processing related operands stored in said alterable memory in response to the typewriter input signal from said typewriter under control of the business data processing related instructions stored in said main memory, wherein said processing logic includes

1. direct transfer access means for accessing a direct transfer instruction from said read only memory,

18. direct transfer control means for transferring control to a selected instruction stored in said read only memory in response to the direct transfer instruction accessed with said direct transfer access means,direct transfer return means for storing a return address in said alterable memory in response to the direct transfer instruction accessed with said direct transfer access means,interrupt means for interrupting the operand processing in response to an input interrupt signal, andinput interrupt means for generating the input interrupt signal, and

d. integrated circuit serial output logic for generating a serial output signal in response to the processing of business data processing related operands with said processing logic;

and

a typewriter printer for printing business information in response to the serial output signal from said serial output logic.

19. A business computer system comprising:

a typewriter keyboard for generating a typewriter input signal in relation to business information;

an integrated circuit computer including

1. an integrated circuit read only memory for storing computer instructions related to business data processing,

2. an integrated circuit alterable memory for storing computer operands related to business data processing,

3. integrated circuit processing logic for processing the business data processing related operands stored in said alterable memory in response to the typewriter input signal from said typewriter under control of the business data processing related instructions stored in said main memory, wherein said processing logic includes

(a) first accessing means for accessing a single byte instruction from said read only memory,

(b) means for generating a single byte identification signal in response to the single byte instruction accessed with said first accessing means,

(c) means for processing a computer operand stored in said alterable memory under control of the accessed single byte instruction in response to the single byte identification signal,

(d) second accessing means for accessing a first byte of a triple byte instruction from said read only memory,

(e) means for generating a triple byte identification signal in response to a first byte of a triple byte instruction accessed with said second accessing means,

(f) third accessing means for accessing a second byte and a third byte of a triple byte instruction from said read only memory in response to the triple byte identification signal, and

(g) means for processing a computer operand stored in said alterable memory under control of a triple byte instruction in response to the accessing of the three bytes of the triple byte instruction, and

20. integrated circuit serial output logic for generating a serial output signal in response to the processing of business data processing related operands with said processing logic;

and

a typewriter printer for printing business information in response to the serial output signal from said serial output logic.

21. A business computer system comprising:

a typewriter printer for generating a typewriter input signal in relation to business information;

an integrated circuit computer including

a. an integrated circuit read only memory for storing computer instructions related to business data processing,

b. an integrated circuit alterable memory for storing computer operands related to business data processing,

c. integrated circuit processing logic for processing the business data processing related operands stored in said alterable memory in response to the typewriter input signal from said typewriter under control of the business data processing related instructions stored in said main memory, said processing logic including

1. execution means for processing the operand words stored in said alterable memory in response to execution of the instruction words stored in said read only memory, said execution means including word-time means for generating a sequence of word-time signals in response to an instruction word stored in said read only memory and bit-time means for generating a sequence of bit-time signals in response to a word-time signal, said execution means including means for executing the instruction words stored in said read only memory in response to the word-time signals and the bit-time signals,

2. accumulator register means for storing an operand word,

3. add means for adding an operand word stored in said accumulator register in response to execution of an add instruction word,

4. subtract means for subtracting an operand word stored in said alterable memory from the operand word stored in said accumulator register in response to execution of a subtract instruction word,

5. shift means for shifting the operand word stored in said accumulator register in response to execution of a shift instruction word,

22. direct transfer means for providing a direct transfer operation;

said direct transfer means including means for accessing a direct transfer instruction word from said read only memory, means for accessing two direct transfer address words from said read only memory in response to the direct transfer instruction word, means for transferring to a direct transfer address defined by the two direct transfer address words in response to the direct transfer instruction word, and means for storing a return address defined by the two direct transfer address words in said alterable memory in response to the direct transfer address,

7. indirect transfer means for providing an indirect transfer operation;

said indirect transfer means including means for accessing an indirect transfer instruction word from said read only memory, means for accessing a return address from said alterable memory in response to the indirect transfer instruction word, and means for transferring to the return address in response to the indirect transfer instruction word, and

8. decrement means for decrementing an operand word stored in said alterable memory in response to execution of a decrement instruction word, and

d. integrated circuit serial output logic for generating a serial output signal in response to the processing of business data processing related operands with said processing logic; and

a typewriter printer for printing business information in response to the serial output signal from said serial output logic.

23. A machine control system comprising:

operator input means for generating an operator input signal in relation to a desired velocity condition;

an integrated circuit computer including

a. an integrated circuit main memory for storing computer instructions related to control of velocity, wherein said main memory includes means for storing the computer instructions as eight bit bytes,

b. an integrated circuit alterable memory for storing computer operands related to control of velocity,

c. integrated circuit processing logic for processing the velocity control related operands stored in said alterable memory in response to the operator input signal from said operator input means under control of the velocity control related instructions stored in said main memory, wherein said processing logic includes means for executing a transfer instruction, wherein said transfer instruction executing means includes means for accessing three sequential eight bit bytes from said main memory and means for transferring instruction control in response to the three eight bit bytes accessed from said main memory, and

d. integrated circuit serial output logic for generating a serial velocity control output signal in response to the processing of velocity control related operands with said processing logic; and

control means for controlling velocity of a machine in response to the serial velocity control output signal.

24. A machine control system comprising:

operator input means for generating an operator input signal in relation to a desired velocity condition;

an integrated circuit computer including

a. an integrated circuit main memory for storing computer instructions related to control of velocity, wherein said main memory includes means for storing the computer instructions as eight bit bytes.

b. an integrated circuit alterable memory for storing computer operands related to control of velocity,

c. integrated circuit processing logic for processing the velocity control related operands stored in said alterable memory in response to the operator input signal from said operator input means under control of the velocity control related instructions stored in said main memory memory, wherein said processing logic includes transfer means for executing a transfer instruction, wherein said transfer means includes

1. first accessing means for accessing a first eight bit byte from said main memory,

2. transfer signal means for generating a transfer signal in response to detecting of a particular code of said first eight bit byte,

3. second accessing means for accessing a second eight bit byte from said main memory in response to the detecting of the particular code of said first eight bit byte,

4. third accessing means for accessing a third eight bit byte from said main memory in response to the accessing of the second eight bit byte, and

5. transfer address means for generating a transfer address in response to the second eight bit byte and the third eight bit byte accessed from said main memory, and

6. forth accessing means for accessing a next instruction eight bit byte from said main memory in response to the transfer address, and

d. integrated circuit serial output logic for generating a serial velocity control output signal in response to the processing of velocity control related operands with said processing logic; and

output means for controlling velocity of a machine in response to the serial velocity control output signal.

25. A machine control system comprising:

operator input means for generating an operator input signal in relation to a desired velocity condition;

an integrated circuit computer including

a. an integrated circuit main memory for storing computer instructions related to control of velocity,

b. an integrated circuit alterable memory for storing computer operands related to control of velocity,

c. integrated circuit processing logic for processing the velocity control related operands stored in said alterable memory in response to the operator input signal from said operator input means under control of the velocity control related instructions stored in said main memory, said processing logic including micro-instruction means for executing a plurality of micro-instructions under control of the velocity control related instructions stored in said main memory to process the velocity control related operands, and

d. integrated circuit serial output logic for generating a serial velocity control output signal in response to the processing of velocity control related operands with said processing logic; and

output means for controlling velocity of a machine in response to the serial velocity control output signal.

26. A machine control system comprising:

operator input means for generating an operator input signal in relation to a desired velocity condition;

an integrated circuit computer including

a. an integrated circuit main memory for storing computer instructions related to control of velocity,

b. an integrated circuit alterable memory for storing computer operands related to control of velocity,

c. integrated circuit processing logic for processing the velocity control related operands stored in said alterable memory in response to the operator input signal from said operator input means under control of the velocity control related instructions stored in said main memory, said processing logic including micro-operation means for generating a plurality of sequential micro-operations under control of a velocity control related instruction stored in said main memory, wherein said micro-operation means includes means for executing at least one micro-instruction for each of the plurality of sequential micro-operations, and

d. integrated circuit serial output logic for generating a serial velocity control output signal in response to the processing of velocity control related operands with said processing logic; and

output means for controlling velocity of a machine in response to the serial velocity control output signal.

27. A machine control system comprising:

operator input means for generating an operator input signal in relation to a desired velocity condition;

an integrated circuit computer including

a. an integrated circuit main memory for storing computer instructions related to control of velocity,

b. an integrated circuit alterable memory for storing computer operands related to control of velocity,

c. integrated circuit processing logic for processing the velocity control related operands stored in said alterable memory in response to the operator input signal from said operator input means under control of the velocity control related instructions stored in said main memory, said processing logic including

1. interrupt means for generating an interrupt signal,

2. transfer means for accessing an interrupt instruction stored in said main memory in response to the interrupt signal, and

28. return means for storing a return address in said alterable memory in response to the accessing of an interrupt instruction from said main memory, and

d. integrated circuit serial output logic for generating a serial velocity control output signal in response to the processing of velocity control related operands with said processing logic;

and

output means for controlling velocity of a machine in response to the serial velocity control output signal.

29. A machine control system comprising:

operator input means for generating an operator input signal in relation to a desired velocity condition;

an integrated circuit computer including

a. an integrated circuit main memory for storing computer instructions related to control of velocity,

b. an integrated circuit alterable memory for storing computer operands related to control of velocity,

c. integrated circuit processing logic for processing the velocity control related operands stored in said alterable memory in response to the operator input signal from said operator input means under control of the velocity control related instructions stored in said main memory, said processing logic including

1. accumulator means for storing an operand,

2. add means for adding an operand stored in said accumulator means and an operand stored in said alterable memory in response to an add instruction stored in said main memory,

30. subtract means for subtracting an operand stored in said accumulator means and an operand stored in said alterable memory in response to a subtract instruction stored in said main memory,logical means for logically processing an operand stored in said accumulator means and an operand stored in said alterable memory in response to a logical instruction stored in said main memory, andtransfer means for generating a transfer signal in response to a transfer instruction stored in said main memory, wherein said processor includes means for accessing an instruction stored in said main memory in response to the transfer signal and means for storing a return address in said alterable memory in response to the transfer signal, and

d. integrated circuit serial output logic for generating a serial velocity control output signal in response to the processing of velocity control related operands with said processing logic;

and

output means for controlling velocity of a machine in response to the serial velocity control output signal.

31. A machine control system comprising:

operator input means for generating an operator input signal in relation to a desired velocity condition;

an integrated circuit computer including

1. an integrated circuit main memory for storing computer instructions related to control of velocity,

2. an integrated circuit alterable memory for storing computer operands related to control of velocity,

3. integrated circuit processing logic for processing the velocity control related operands stored in said alterable memory in response to the operator input signal from said operator input means under control of the velocity control related instructions stored in said main memory, said processing logic including integrated circuit transfer logic for transferring instruction control in response to a triple byte transfer instruction stored in said main memory, said transfer logic including

a. means for accessing a first byte,

b. means for generating a transfer signal in response to a transfer instruction code in said first byte,

c. means for accessing a second byte in response to the transfer signal,

d. means for accessing a third byte in response to the transfer signal,

e. means for combining said second byte and said third byte to form a double byte transfer address, said combining means including means for combining the second byte as the least significant half of the transfer address and means for combining the third byte as the most significant half of the transfer address, and

f. means for transferring instruction control in response to the double byte transfer address, and

32. integrated circuit serial output logic for generating a serial velocity control output signal in response to the processing of velocity control related operands with said processing logic;

and

output means for controlling velocity of a machine in response to the serial velocity control output signal.

33. A machine control system comprising:

operator input means for generating an operator input signal in relation to a desired velocity condition;

an integrated circuit computer including

1. an integrated circuit main memory for storing computer instructions related to control of velocity,

2. an integrated circuit alterable memory for storing computer operands related to control of velocity,

3. integrated circuit processing logic for processing the velocity control related operands stored in said alterable memory in response to the operator input signal from said operator input means under control of the velocity control related instructions stored in said main memory, said processing logic including integrated circuit transfer logic for transferring instruction control in response to a triple byte transfer instruction stored in said main memory, said transfer logic including

a. means for accessing a first byte,

b. means for generating a transfer signal in response to a transfer instruction code in said first byte,

c. means for accessing a second byte in response to the transfer signal,

d. means for accessing a third byte in response to the transfer signal,

e. means for combining said second byte and said third byte to form a double byte transfer address, said combining means including means for combining the second byte as the least significant half of the transfer address and means for combining the third byte as the most significant half of the transfer address,

f. means for transferring instruction control in response to the double byte transfer address, and

g. return address means for storing a return address in said alterable memory in response to the transfer instruction, and

34. integrated circuit serial output logic for generating a serial velocity control output signal in response to the processing of velocity control related operands with said processing logic;

and

output means for controlling velocity of a machine in response to the serial velocity control output signal.

35. A machine control system comprising:

operator input means for generating an operator input signal in relation to a desired velocity condition;

an integrated circuit computer including

1. an integrated circuit main memory for storing computer instructions related to control of velocity,

2. an integrated circuit alterable memory for storing computer operands related to control of velocity,

3. integrated circuit processing logic for processing the velocity control related operands stored in said alterable memory in response to the operator input signal from said operator input means under control of the velocity control related instructions stored in said main memory, wherein said processing logic includes

a. means for accessing a single byte instruction from said read only memory,

b. means for executing the accessed single byte instruction,

c. means for accessing a double byte instruction from said read only memory,

d. means for executing the accessed double byte instruction,

e. means for accessing a triple byte instruction from said read only memory, and

f. means for executing the accessed triple byte instruction, and

36. integrated circuit serial output logic for generating a serial velocity control output signal in response to the processing of velocity control related operands with said processing logic;

and

output means for controlling velocity of a machine in response to the serial velocity control output signal.

37. A machine control system comprising:

operator input means for generating an operator input signal in relation to a desired velocity condition;

an integrated circuit computer including

a. an integrated circuit main memory for storing computer instructions related to control of velocity,

b. an integrated circuit alterable memory for storing computer operands related to control of velocity,

c. integrated circuit processing logic for processing the velocity control related operands stored in said alterable memory in response to the operator input signal from said operator input means under control of the velocity control related instructions stored in said main memory, wherein said processing logic includes indirect transfer means for providing indirect transfer of program control, said indirect transfer means including

1. means for accessing an indirect transfer instruction from said main memory,

38. means for generating an indirect transfer signal in response to an indirect transfer instruction accessed from said main memory,means for accessing an indirect transfer address from said alterable memory in response to the indirect transfer signal, andmeans for accessing an instruction from said main memory in response to the indirect transfer address accessed from said alterable memory, and

d. integrated circuit serial output logic for generating a serial velocity control output signal in response to the processing of velocity control related operands with said processing logic;

and

output means for controlling velocity of a machine in response to the serial velocity control output signal.