Error recovery method and apparatus
First Claim
1. An error recovery apparatus in a data processing system comprising:
- a peripheral unit for storing data in a plurality of data blocks, each of said data blocks having a unique address;
a memory for storing a first channel command word (CCW) chain, said memory having storage areas for storing data transferred from said peripheral unit;
a controller connected between said memory and said peripheral unit for reading said data blocks from said peripheral unit and transferring said data blocks to said memory to store said data blocks in said storage areas determined by said first CCW chain, said controller having detecting means to detect an uncorrectable error in the transfer of the second or subsequent data block of said plurality of data blocks, and;
processing means connected to said controller for generating a new CCW chain when an uncorrectable error occurs in a second or subsequent data block of said plurality of data blocks.
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Abstract
There is disclosed an error recovery apparatus and method for a data processing system having (1) a peripheral unit, for instance, a magnetic disc unit, for storing data in a plurality of blocks each having a unique address, (2) a main memory for storing data read from the peripheral units, and (3) a controller for controlling the transfer of the data blocks from the peripheral unit to the main memory by execution of a single channel command word (CCW) chain. When an uncorrectable error occurs in the transfer of a second or subsequent data block of the plurality of data blocks (not the first data block), the processor produces a new CCW chain to re-read the data block in error in addition to all the data blocks subsequent to the data blocking error and store these data blocks in the memory under the control of the new CCW chain.
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Citations
14 Claims
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1. An error recovery apparatus in a data processing system comprising:
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a peripheral unit for storing data in a plurality of data blocks, each of said data blocks having a unique address; a memory for storing a first channel command word (CCW) chain, said memory having storage areas for storing data transferred from said peripheral unit; a controller connected between said memory and said peripheral unit for reading said data blocks from said peripheral unit and transferring said data blocks to said memory to store said data blocks in said storage areas determined by said first CCW chain, said controller having detecting means to detect an uncorrectable error in the transfer of the second or subsequent data block of said plurality of data blocks, and; processing means connected to said controller for generating a new CCW chain when an uncorrectable error occurs in a second or subsequent data block of said plurality of data blocks.
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2. An error recovery apparatus in a data processing system comprising:
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a peripheral unit for storing data in a plurality of data blocks, each of said data blocks having an address; a memory for storing a first channel command word (CCW) chain, said memory having storage areas for storing data transferred from said peripheral unit; a controller connected between said memory and said peripheral unit for reading said data blocks from said peripheral unit and transferring said data blocks to said memory to store said data blocks in said storage areas determined by said first CCW chain, said controller having detecting means to detect an uncorrectable error in the transfer of the second or subsequent data block of said plurality of data blocks; a first register connected to said controller for storing the total number of data units in all data blocks successfully transferred to said memory; a second register connected to said controller for storing the address of the data block currently being transferred from said peripheral units to said memory; and processing means connected to said controller for generating a new CCW chain when an uncorrectable error occurs in a second or subsequent data block of said plurality of data blocks, said new CCW chain generated by said processing means by considering the contents of said first register, the contents of said second register, and said first CCW chain. - View Dependent Claims (3, 4, 5)
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6. An error recovery method for a data processing system that includes a peripheral unit to store data in a plurality of data blocks each having a unique address, a memory for storing a first channel command word (CCW) chain and having storage areas to store said data blocks, and a controller for transferring a plurality of data blocks between said peripheral units and said memory comprising:
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reading said plurality of data blocks from the peripheral units according to said first CCW chain; writing said plurality of data blocks to said memory under the control of said first CCW chain; detecting uncorrectable errors in the said data read from said peripheral unit; counting the total number of data units in each of said data blocks correctly written in said storage area of said memory; retaining the address of the data block currently read from the peripheral unit; stopping said counting and said retaining when an uncorrectable error is detected; generating, in response to the detection of an uncorrectable error, a second CCW chain determined by said first CCW chain, the total number of data units correctly written, and the address of the last correctly transferred data block; reading the data blocks subsequent to the last correctly transferred data block under the control of said second CCW chain; and writing said subsequent data blocks into said memory under the control of said second CCW chain. - View Dependent Claims (7, 8, 9, 10)
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11. A method of transferring data between a magnetic disc unit on which data is stored in uniquely addressed records and a main memory directed by a controller, said main memory storing a first channel command word (CCW) chain and having storage areas for storing said records, comprising:
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reading a plurality of said uniquely addressed records by the execution of a single command contained in a first CCW chain; storing said records in said memory under the control of said first CCW chain when no errors or correctable errors occur in said records; detecting whether uncorrectable errors occur in a first record or in a second or subsequent record of said plurality of records transferred by said first CCW chain; retaining the address of the record from which data was read in error and the address of the location in the main memory where uncorrectable errors have occurred in transferring a second or subsequent record; retaining the amount of data successfully transferred to said main memory under the control of said first CCW chain; producing a second CCW chain according to said retained addresses and said amount of successfully transferred data, and said first CCW chains, and; transferring said record in which uncorrectable errors occurred and any subsequent records required by said first CCW chain under the control of said second CCW chain. - View Dependent Claims (12, 13, 14)
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Specification