Interface system which selectively provides impedance matching between a host computer and a control circuit

• US 4,694,421 A
• Filed: 06/05/1984
• Issued: 09/15/1987
• Est. Priority Date: 06/29/1983
• Status: Expired due to Term

• Current Assignee: Canon Finetech Business Machines Company Limited (Canon Inc.)
• Original Assignee: Canon Hi-Tech Limited (Canon Inc.)
• Inventors: Ogawa, Tetsu
• Primary Examiner(s): Williams, Jr., Archie E.
• Application Number:
  US06/617,823
• Time in Patent Office: 1,197 Days
• Field of Search: 364/200, 364/900, 307/31, 307/39, 307/40
• US Class Current: 307/31
• CPC Class Codes: G06F 13/40 Bus structure for computer networks G06F15/163; for optical bus networks H04B10/25
• CPC Class Codes: G06F 3/00 Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
• CPC Class Codes: H03H 7/38 Impedance-matching networks

Abstract

An interface system has a plurality of signal lines connected between a plurality of input terminals of a control circuit and a plurality of output terminals of a host computer. A plurality of resistor elements each have one end connected to a corresponding one of the plurality of signal lines and the other ends connected in common to a second of a pair of first and second terminals. The first terminal is connected to a power source to supply electric power when the terminal pair is short-circuited by a jumper disposed between the first and second terminals. A plurality of diode elements anodes connected to the second terminal of the terminal pair and cathodes connected to the other ends of the plurality of resistor elements. The resistor elements are electrically interrupted without physically removing the resistor elements by opening the path between the first and second terminals.

Claims

1. An interface system for connecting a control circuit to a host computer wherein said control circuit is provided with input terminals and said host computer is provided with output terminals, said interface system comprising

a plurality of signal lines, each of said signal lines connecting one of the input terminals of said control circuit to a corresponding one of the output terminals of said computer;

a plurality of resistor elements each having first and second ends, the first end of each of said resistor elements being connected to a corresponding one of said plurality of signal lines;

a connector having first and second terminals, said first terminal being connected to a power source;

a plurality of diode elements each having first and second ends, the first end of each of said diode elements being connected to the second end of a corresponding one of said plurality of resistor elements and the second ends of said diode elements being connected to each other and to the second terminal of said connector, the polarity of each of said diode elements being such that a signal on the signal line to which it is connected through an associated resistor element is not transmitted to said second terminal; and

means for selectively connecting together said first and second terminals whereby, when said first and second terminals are connected together said plurality of resistor elements are connected to said power source to provide impedance matching for the output of said host computer, and when said first and second terminals are not connected said resistor elements are electrically disconnected from the system.

2. An interface system as defined in claim 1, wherein the voltage of said power source is positive with respect to a reference potential, and wherein the first end of each of said diode elements is a cathode and the second end of each of said diode elements is an anode.

3. An interface system as defined in claim 1, wherein said means for selectively connecting said first and second terminals is a short-circuiting pin.

4. An interface system as defined in claim 1, wherein said connector comprises a switch means.