Image sensor array for assembly with like arrays to form a longer array

• US 4,695,716 A
• Filed: 10/27/1986
• Issued: 09/22/1987
• Est. Priority Date: 12/13/1985
• Status: Expired due to Term

• Current Assignee: Xerox Corporation (Xerox Holdings Corp.)
• Original Assignee: Xerox Corporation (Xerox Holdings Corp.)
• Inventors: Tandon, Jagdish C., Araghi, Mehdi N.
• Primary Examiner(s): Nelms, David C.
• Application Number:
  US06/923,516
• Time in Patent Office: 330 Days
• Field of Search: 250/211 R, 250/211 J, 250/578, 357/30 D, 357/30 H, 357/30 K, 357/24 LR, 358/212, 358/213, 358/293
• US Class Current: 250/214.1
• CPC Class Codes: H01L 21/30608 Anisotropic liquid etching H01L21/3063 takes precedence
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 27/1446 in a repetitive configuration

Abstract

Apparatus and method of fabricating a sensor array from a (110) silicon substrate having a row of photosites to provides a sensor array chip with uniformly smooth and angled ends designed to permit the chip to be lock butted end to end with other like chips to form a full length scanning array in which the substrate is etched for separation along the (111) planes at the desired boundaries of the chip, the etched boundaries delimiting the chip ends running between selected pairs of photosites to provide whole photosites right up to the ends of the chip so as to avoid any cap or interruption between the photosites at the junctions with other chips.

In a second embodiment, the chip ends are formed with complementary irregular shapes to enhance locating and butting of the chips with one another, and in a third embodiment, grooves are etched between each of the photosites in the row to assure photosite uniformity and prevent cross talk between photosites.

Claims

1. A sensor array adapted for assembly with other like arrays to provide a longer array, comprising;

(a) a (110) silicon chip;

(b) at least one row of photosites on said chip, the boundaries of said photosites being parallel to the (111) planes of said chip whereby said photosites are generally in the shape of a parallelogram;

(c) the opposing ends of said chip being uniformly smooth and parallel to said chip (111) planes whereby the ends of said chip extend at an acute angle to the axis of said row of photosites so that said chip has a generally parallelogram shape complementary to said photosites;

(d) each end of said chip being formed along a line passing along the boundary between adjoining photosites so that the photosites at the border of each end of said chip are unimpaired and the same size as the other photosites in said row of photosites whereby said chip may be assembled with other like chips by bringing said chip ends into abutting engagement with the ends of adjoining chips with the photosite row of said chip being aligned with the photosite rows of said adjoining chips.