Security for integrated circuit microcomputer with EEPROM
First Claim
1. In an integrated circuit microcomputer having on-board memory including an EEPROM and having detection means for detecting a request for a mode of operation of the microcomputer and characterized as having a first mode of operation in which contents of the EEPROM can be read externally from the microcomputer, and a second mode of operation in which the contents of the EEPROM cannot be externally read from the microcomputer, means for securing the contents of the on-board memory, comprising:
- an EEPROM security bit which can be set after the EEPROM has been loaded and which is erasable only if the EEPROM is also erased; and
first means, coupled to the detection means, for erasing the contents of the EEPROM in response to the detection means receiving a request for the first mode of operation when the security bit is set.
2 Assignments
0 Petitions
Accused Products
Abstract
An integrated circuit microcomputer with EEPROM has a limited number of modes for operation. In at least first and second modes, the inner workings of the microcomputer, including the contents of the EEPROM, can be read externally from the microcomputer. An EEPROM security bit, when set, prevents the first mode from being entered and causes the EEPROM to be erased when the second mode is entered. The EEPROM is also erased if the security bit is erased.
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Citations
19 Claims
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1. In an integrated circuit microcomputer having on-board memory including an EEPROM and having detection means for detecting a request for a mode of operation of the microcomputer and characterized as having a first mode of operation in which contents of the EEPROM can be read externally from the microcomputer, and a second mode of operation in which the contents of the EEPROM cannot be externally read from the microcomputer, means for securing the contents of the on-board memory, comprising:
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an EEPROM security bit which can be set after the EEPROM has been loaded and which is erasable only if the EEPROM is also erased; and first means, coupled to the detection means, for erasing the contents of the EEPROM in response to the detection means receiving a request for the first mode of operation when the security bit is set. - View Dependent Claims (2, 3, 4, 5, 6)
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7. In an integrated circuit microcomputer having on-board memory including an EEPROM and having detection means for detecting a request for a mode of operation of the microcomputer and characterized as having a first mode of operation in which contents of the EEPROM can be read externally from the microcomputer, and a second mode of operation in which the contents of the EEPROM cannot be read externally from the microcomputer, a method of securing the contents of the on-board memory, comprising:
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providing an EEPROM security bit which can be set after the EEPROM has been loaded; loading the EEPROM; setting the security bit; and erasing the EEPROM in response to the detection means receiving a request for the first mode of operation. - View Dependent Claims (8, 9, 10, 11)
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12. In an integrated circuit microcomputer having on-board memory including an EEPROM and a ROM and having detection means for detecting a request for a mode of operation of the microcomputer and characterized as having a first mode of operation in which contents of the EEPROM can be read externally from the microcomputer, and a second mode of operation in which the contents of the EEPROM cannot be read externally from the microcomputer, a method of securing the contents of the on-board memory, comprising:
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providing an EEPROM security bit which can be set after the EEPROM has been loaded; loading the ROM with a program which causes the microcomputer to erase the EEPROM in response to the detection means receiving a request for the first mode of operation. - View Dependent Claims (13)
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14. In an integrated circuit microcomputer having on-board memory including an EEPROM and having detection means for detecting a request for a mode of operation of the microcomputer and characterized as having a first mode of operation in which contents of the EEPROM can be read externally from the microcomputer and a second mode of operation in which the contents of the EEPROM cannot be read externally from the microcomputer, means for securing the contents of the on-board memory comprising:
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an EEPROM security bit which can be set after the EEPROM has been loaded; a ROM containing a program which causes the microcomputer to erase the EEPROM in response to the detection means receiving a request for the first mode of operation when the security bit is set. - View Dependent Claims (15, 16, 17, 18, 19)
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Specification