Analog signal processor

• US 4,700,174 A
• Filed: 05/12/1986
• Issued: 10/13/1987
• Est. Priority Date: 05/12/1986
• Status: Expired due to Term

• Current Assignee: Westinghouse Electric Company LLC (Brookfield Asset Management Incorporated)
• Original Assignee: Westinghouse Electric Corporation (Paramount Global (f/k/a ViacomCBS Inc.))
• Inventors: Kenny, Thomas J., Crew, Albert W., Sutherland, James F.
• Primary Examiner(s): Miller, Charles D.
• Application Number:
  US06/862,335
• Time in Patent Office: 519 Days
• Field of Search: 340/347 CC, 376/245, 376/259, 364/571, 364/724, 371/25
• US Class Current: 341/120
• CPC Class Codes: G06J 1/00 Hybrid computing arrangements digitally-programmed analogue computers G06G7/06

Abstract

Apparatus and a method for use therein are disclosed for an analog signal processor, particularly one suited for use in nuclear power plant applications, which converts analog process signals to digital form and employs continuous on-line automatic calibration in order to accurately compensate for gain and bias errors occurring in its input analog circuitry.

Claims

1. Apparatus for an analog signal processing system comprising:

an analog input circuit having means for controllably selecting an incoming process signal or at least one reference voltage as an input voltage;

means for sampling said input voltage to obtain a sampled value and for producing a digital signal equivalent to said sampled value;

means for digitally filtering said sampled value to yield an actual filtered value of said process signal and a separate actual filtered value of said reference voltage;

means, responsive to said actual filtered reference voltage value and to an expected value of said filtered reference voltage, for calculating at least one coefficient appearing in a pre-defined model of said analog input circuitry to determine an error component injected by said analog input circuitry and existing in the filtered value of said reference voltage; and

means for compensating said actual filtered value of the process signal, in accordance with said model and using said calculated coefficient therein, to yield a calibrated value therefor.

2. The apparatus in claim 1 wherein said selecting means comprises means for controllably selecting between first and second reference voltages such that corresponding actual filtered values for said first and second reference voltages are generated by said calculating means.

3. The apparatus in claim 2 wherein said calculating means comprises means, responsive to said actual filtered values for said first and second reference voltages and to expected values therefor, for linearly estimating gain and bias values of said analog input circuit, wherein said gain value is estimated as the ratio of the difference between the actual filtered values for both of said reference voltages to the difference between the expected filtered values for both of said reference voltages, and said bias value is estimated as the actual filtered value of one of said reference voltages less that gain value times the expected filtered value for said one of the reference voltages.

4. The apparatus in claim 3 wherein said analog input circuit comprises means, connected between said selecting means and said sampling and producing means, for varying the gain and bias of said analog input circuit in response to difference between actual filtered values and expected values of said reference voltages produced by said analog input circuit to ensure that subsequently occurring reference voltages produced by said analog input circuit remain within pre-selected ranges.

5. The apparatus in claim 3 wherein said filtering means comprises means for forming an extended precision digital word in which input data to be processed by said filter occupies contiguous intermediate locations in said word thereby decreasing quantization noise generated during said filtering.

6. The apparatus in claim 3 further comprising means for testing each of said gain and bias values to verify the integrity of said system.

7. The apparatus in claim 6 wherein the sampling and producing means comprises means for sequentially selecting each one of a plurality of input voltages produced by a corresponding plurality of analog input circuits.

8. The apparatus in claim 7 wherein the sampling and producing means further comprises means for sequentially sampling all of the incoming process signals from all of said analog input circuits and one of said reference signals from a pre-selected sequential one of said analog input circuits.

9. The apparatus in claim 8 wherein said filtering means digitally filters a present value of said input voltage while said sampling and producing means generates the next successive digital value of said input voltage.

10. The apparatus in claim 9 wherein the magnitudes of the first and second reference voltages applied to said selecting means within any one of said analog input circuits are greater than a maximum expected value of and less than a minimum expected value, respectively, of said process signal applied as input to said one analog input circuit.

11. Apparatus for an analog signal processing system comprising:

an analog input circuit having means for controllably selecting an incoming process signal, a first reference voltage or a second reference voltage as an input voltage;

means for sampling said input voltage to obtain a sampled value and for producing a digital signal equivalent to said sampled value;

means for digitally filtering said sampled value to yield an actual filtered value of said process signal and a separate actual filtered value of each of said first and second reference voltages;

means, responsive to said actual filtered values for said first and second reference voltages and to expected values therefor, for linearly estimating gain and bias values of said analog input circuit, wherein said gain value is estimated as the ratio of the difference between the actual filtered values for both of said reference voltages to the difference between the expected filtered values for both of said reference voltages, and said bias value is estimated as the actual filtered value of one of said reference voltages less that gain value times the expected filtered value for said one of the reference voltages; and

means for compensating the actual filtered value of the process signal, in accordance with a pre-defined relationship using said calculated gain and bias values, to yield a calibrated value for said process signal.

12. The apparatus in claim 11 wherein said analog input circuit comprises means, connected between said selecting means and said sampling and producing means, for varying the gain and bias of said analog input circuit in response to difference between actual filtered values and expected values of said reference voltages produced by said analog input circuit to ensure that subsequently occurring reference voltages produced by said analog input circuit remain within pre-selected ranges.

13. The apparatus in claim 11 wherein said filtering means comprises means for forming an extended precision digital word in which input data to be processed by said filter occupies contiguous intermediate locations in said word thereby decreasing quantization noise generated during said filtering.

14. The apparatus in claim 11 further comprising means for testing each of said gain and bias values to verify the integrity of said system.

15. The apparatus in claim 14 wherein the sampling and producing means comprises means for sequentially selecting each one of a plurality of input voltages produced by a corresponding plurality of analog input circuits.

16. The apparatus in claim 15 wherein the sampling and producing means further comprises means for sequentially sampling all of the incoming process signals from all of said analog input circuits and one of said reference signals from a pre-selected sequential one of said analog input circuits.

17. The apparatus in claim 16 wherein said filtering means digitally filters a present value of said input voltage while said sampling and producing means generates the next successive digital value of said input voltage.

18. The apparatus in claim 17 wherein the magnitudes of the first and second reference voltages applied to said selecting means within any one of said analog input circuits are greater than a maximum expected value of and less than a minimum expected value, respectively, of said process signal applied as input to said one analog input circuit.

19. A method for use in an analog signal processing system comprising the steps of:

controllably selecting an incoming process signal or at least one reference voltage to be applied as an input voltage to an analog input circuit;

sampling said input voltage to obtain a sampled value and for producing a digital signal equivalent to said sampled value;

digitally filtering said sampled value to yield an actual filtered value of said process signal and a separate actual filtered value of said reference voltage;

calculating, in response to said actual filtered reference voltage value and to an expected value of said filtered reference voltage, at least one coefficient appearing in a pre-defined model of said analog input circuitry to determine an error component injected by said analog input circuitry and existing in the filtered value of said reference voltage; and

compensating said actual filtered value of the process signal, in accordance with said model and using said calculated coefficient therein, to yield a calibrated value therefor.

20. The method in claim 19 wherein said selecting step comprises the step of controllably selecting between first and second reference voltages such that corresponding actual filtered values for said first and second reference voltages are generated by said calculating means.

21. The method in claim 20 wherein the calculating step includes the step of linearly estimating, in response said actual filtered values for said first and second reference voltages and to expected values therefor, gain and bias values of said analog input circuit, wherein said gain value is estimated as the ratio of the difference between the actual filtered values for both of said reference voltages to the difference between the expected filtered values for both of said reference voltages, and said bias value is estimated as the actual filtered value of one of said reference voltages less that gain value times the expected filtered value for said one of the reference voltages.

22. The method in claim 21 further comprising the step of:

varying the gain and bias of said analog input circuit in response to differences between actual filtered values and expected values of said reference voltages produced by said analog input circuit to ensure that subsequently occurring reference voltages produced by said analog input circuit remain within pre-selected ranges.

23. The method in claim 21 wherein the filtering step comprises the step of forming an extended precision digital word in which input data to be processed by said filter occupies continguous intermediate locations in said word thereby decreasing quantization noise generated during said filtering.

24. The method in claim 21 further comprising the step of testing each of said gain and bias values to verify the integrity of said system.

25. The method in claim 24 wherein the sampling and producing step further comprises the step of sequentially selecting each one of a plurality of input voltages produced by a corresponding plurality of analog input circuits.

26. The method in claim 25 wherein the sampling and producing step further comprises the step of sequentially sampling all of the incoming process signals from all of said analog input circuits and one of said reference signals from a pre-selected sequential one of said analog input circuits.

27. The method in claim 26 wherein said filtering step further comprises the step of digitally filtering a present value of said input voltage while said sampling and producing step generates the next successive digital value of said input voltage.