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Method of producing semiconductor integrated circuit having parasitic channel stopper region

  • US 4,710,265 A
  • Filed: 12/04/1986
  • Issued: 12/01/1987
  • Est. Priority Date: 11/30/1985
  • Status: Expired due to Term
First Claim
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1. A method of producing a semiconductor integrated circuit, comprising the steps of:

  • preparing a semiconductor substrate of a first conductivity type and having a principal surface;

    disposing a first mask material layer on said principal surface, said first mask material layer having a first impurity introducing region corresponding to a predetermined well forming pattern;

    selectively doping a first impurity which determines a second conductivity type, opposite to said first conductivity type, into said principal surface through said first impurity introducing region, thereby forming a well region in said principal surface, said well region having said second conductivity type which is determined by said first impurity;

    forming a second mask material layer in such a manner as to cover both said first impurity introducing region and said first mask material layer;

    disposing first and second mask layers on said second mask material layer, said first and second mask layers respectively corresponding to a first active region pattern inside said well region and a second active region pattern outside said well region, thereby defining a second impurity introducing region corresponding to a predetermined parasitic channel stopper pattern between the stack portion of said first and second mask material layers and said first mask layer;

    selectively ion-implanting a second impurity which determines said second conductivity type into the surface of said well region through said second impurity introducing region;

    selectively removing said first and second mask material layers by selective etching using said first and second mask layers; and

    carrying out selective thermal oxidation using the remaining portions of said first and second mask material layers as a mask, whereby a field oxide film is formed on said principal surface, and a parasitic channel stopper region is formed within said well region and directly below said field oxide film, said parasitic channel stopper region having said second conductivity type which is determined by said second impurity.

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