Interframe adaptive vector quantization encoding apparatus and video encoding transmission apparatus
First Claim
1. An interframe adaptive vector quantization apparatus comprising:
- a frame memory for storing at least one frame of video signals normally;
a subtractor where, when input signal series of K in number (K;
integer) are brought together into a block and the last video signal series is inputted, prediction signal series in a block at position corresponding to the same position as the previous block at least one frame before the previous signal series on the screen is read from the frame memory and the interframe difference signal series is calculated;
a mean value separation circuit for estimating intrablock mean value of the interframe difference signal series and converting it into input vector by the mean value separation;
a vector quantization encoding member for encoding the input vector into discrimination code of the output vector to maximize total sum of products of elements of the input and output vectors, i.e., the inner product, among a plurality of sets of the output vectors optimized by clustering method in the poly-dimensional space based on statistical properties of normalization vectors by the normalization of the input vectors by the intrablock standard deviation;
a movement detection circuit for executing processing that a block having amplitude coefficient as the total sum of products and the intrablock mean value both being less than prescribed threshold value is made insignificant block and the intrablock picture element values of the interframe difference signal series are made all zero;
a vector quantization decoding member for selecting output vector among the output vector discrimination code corresponding to the significant blocks other than the insignificant blocks and reproducing the interframe difference signal series by multiplication of the amplitude coefficient and adding of the mean value and making the interframe difference signal series to be zero for the insignificant block;
an adder for adding the interframe difference signal series reproduced after the vector quantization to the prediction signal series and reproducing the video signal and writing the video signal to the frame memory; and
a transmission data buffer for performing the variable length encoding of the significance/insignificance block discrimination code, the output vector discrimination code, the block mean value and the amplitude coefficient and controlling the threshold value to make the information generating amount constant.
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Abstract
In an interframe adaptive quantization encoding apparatus to perform efficient encoding of video signals using vector quantization method, analog signals raster-scanned from the left to the right on the screen and from the upper side to the lower side are converted into digital signals, the digital signals per every m picture elements x n lines are made a block and the block data is subjected to mean value separation in a vector quantization encoder thereby input vector is formed, inner product between the input vector and output vector read from a code book ROM is estimated by an inner product operation circuit, and maximum value of the inner product is estimated by a maximum inner product detection circuit and made amplitude coefficient, thereby efficient encoding is performed. The efficient encoding data is transmitted to the transmission path by a transmission data buffer and at the same time threshold value of movement detection in the vector quantization encoding is controlled by a movement detection control circuit, and the encoding data supplied from the vector quantizer is decoded by a vector quantization decoder and the block data is reproduced, thereby the apparatus can be constituted without increasing the circuit scale.
56 Citations
9 Claims
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1. An interframe adaptive vector quantization apparatus comprising:
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a frame memory for storing at least one frame of video signals normally; a subtractor where, when input signal series of K in number (K;
integer) are brought together into a block and the last video signal series is inputted, prediction signal series in a block at position corresponding to the same position as the previous block at least one frame before the previous signal series on the screen is read from the frame memory and the interframe difference signal series is calculated;a mean value separation circuit for estimating intrablock mean value of the interframe difference signal series and converting it into input vector by the mean value separation; a vector quantization encoding member for encoding the input vector into discrimination code of the output vector to maximize total sum of products of elements of the input and output vectors, i.e., the inner product, among a plurality of sets of the output vectors optimized by clustering method in the poly-dimensional space based on statistical properties of normalization vectors by the normalization of the input vectors by the intrablock standard deviation; a movement detection circuit for executing processing that a block having amplitude coefficient as the total sum of products and the intrablock mean value both being less than prescribed threshold value is made insignificant block and the intrablock picture element values of the interframe difference signal series are made all zero; a vector quantization decoding member for selecting output vector among the output vector discrimination code corresponding to the significant blocks other than the insignificant blocks and reproducing the interframe difference signal series by multiplication of the amplitude coefficient and adding of the mean value and making the interframe difference signal series to be zero for the insignificant block; an adder for adding the interframe difference signal series reproduced after the vector quantization to the prediction signal series and reproducing the video signal and writing the video signal to the frame memory; and a transmission data buffer for performing the variable length encoding of the significance/insignificance block discrimination code, the output vector discrimination code, the block mean value and the amplitude coefficient and controlling the threshold value to make the information generating amount constant. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A video encoding transmission apparatus comprising:
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a video encoding circuit for inputting video signal and performing A/D conversion of the signal and then applying efficient video encoding processing per frame to digital video data taken per every other video frame; a transmission buffer constituted by a double buffer to enable simultaneous write/read, for storing one video frame of variable length encoding data with the information generating amount as the video encoding circuit output being not constant and outputting the encoding data at constant speed by the speed smoothing; a transmission control member at transmission side for performing the transmission framing to enable discrimination per one frame unit to the encoding data transmitted from the transmission buffer and transmitting the encoding data from the transmission buffer to the digital transmission path at constant speed; a transmission control member at receiving side for receiving the encoded data transmitted from the digital transmission path; a receiving buffer constituted by a double buffer to enable simultaneous write/read, for storing one frame of encoding data among the receiving data supplied from the transmission control member at receiving side and outputting one video frame of the encoding data at speed being different from the inputting state using synchronous signal supplied from a synchronous signal generating circuit at decoding side as hereinafter described; a synchronous signal generating circuit at decoding side for generating various clocks required for the decoding action at asynchronous state to the transmission side; a video decoding circuit for performing decoding of one video frame of the encoding data using the decoding clock supplied from the synchronous signal generating circuit at decoding side; and a controller for controlling the input/output operation of the transmission buffer and the receiving buffer.
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Specification