Method of fabricating recessed gate static induction transistors

• US 4,713,358 A
• Filed: 05/02/1986
• Issued: 12/15/1987
• Est. Priority Date: 05/02/1986
• Status: Expired due to Term

• Current Assignee: GTE Laboratories Incorporated (Lumen Technologies, Inc.)
• Original Assignee: GTE Laboratories Incorporated (Lumen Technologies, Inc.)
• Inventors: Butler, Scott J., Bulat, Emel S., Ditchek, Brian M.
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): Quach, T. N.
• Application Number:
  US06/858,762
• Time in Patent Office: 592 Days
• Field of Search: 29/576 W, 29/571, 29/590, 29/591, 29/578, 29/580, 357/22, 357/23, 427/93, 427/53.1, 427/6, 427/41, 427/65, 427/200, 427/203, 427/DIG. 911
• US Class Current: 438/193
• CPC Class Codes: H01L 21/28518 the conductive layers comprising silicides H01L21/28537 takes precedence
• CPC Class Codes: H01L 29/1066 Gate region of field-effect devices with PN junction gate
• CPC Class Codes: H01L 29/43 characterised by the materials of which they are formed
• CPC Class Codes: H01L 29/47 Schottky barrier electrodes H01L29/435 takes precedence
• CPC Class Codes: H01L 29/66416 Static induction transistors [SIT] with an active layer made of a group 13/15 material H01L29/66454
• CPC Class Codes: H01L 29/7722 using static field induced regions, e.g. SIT, PBT

Abstract

A low resistivity N-type layer is formed at the surface of a high resistivity N-type epitaxial layer which has been grown on a low resistivity N-type substrate of silicon. Parallel grooves are etched through the low resistivity N-type layer into the high resistivity N-type layer forming interposed ridges of silicon. When fabricating junction gate devices, P-type zones are formed at the end walls of the grooves by ion implantation. A layer of silicon oxide is formed on the side walls of the grooves exposing the silicon at the end walls of the grooves and at the surfaces of the ridges. A layer of a silicide-forming metal, specifically cobalt, is deposited. A rapid thermal annealing treatment is performed which causes the cobalt to react with the silicon and form cobalt silicide at the cobalt-silicon interfaces. The cobalt does not react with the silicon oxide at the side walls of the grooves. The unreacted cobalt is removed by an etching solution which does not attack the cobalt silicide. Metal layers are placed on the cobalt silicide to increase its conductivity as contact members.

Claims

1. The method of fabricating a semiconductor device comprising

providing a substrate of silicon of one conductivity type of relatively low resistivity having a flat, planar surface;

growing an epitaxial layer of silicon of the one conductivity type of relatively high resistivity on said surface of the substrate, said epitaxial layer having a flat, planar surface parallel to the interface of the epitaxial layer and the substrate forming a body of silicon;

introducing conductivity type imparting material of the one conductivity type into said epitaxial layer from said surface to form a layer of silicon of the one conductivity type of relatively low resistivity in said epitaxial layer adjacent to said surface;

forming a layer of protective material on the surface of the body;

removing portions of said layer of protective material to expose a plurality of parallel areas of said surface;

removing silicon at the exposed areas to form a plurality of grooves in said body of silicon providing interposed ridges of silicon having surfaces in said surface of the body, said grooves extending through said layer of silicon of the one conductivity type of relatively low resistivity into the underlying layer of the one conductivity type of relatively high resistivity, each of said grooves having side walls formed by the adjacent ridges of silicon and an end wall;

introducing conductivity type imparting material of the opposite conductivity type into the silicon at the end walls of said grooves to convert zones of silicon of the one conductivity type of relatively high resistivity to the opposite conductivity type;

removing all protective material to expose the silicon at the side walls and end walls of said grooves and at the surfaces of said ridges;

forming a layer of silicon oxide on the side walls and end walls of said grooves and on said surfaces of said ridges;

removing the layer of silicon oxide from the end walls of said grooves and from said surfaces of said ridges to expose the silicon at said end walls of the grooves and at said surfaces of said ridges while leaving silicon oxide overlying the side walls of said grooves;

depositing a silicide-forming metal overlying the silicon oxide at the side walls of the grooves, the silicon at the end walls of the grooves, and the silicon at the surfaces of the ridges;

heating to cause the silicide-forming metal to react with the underlying silicon to form metal silicide in ohmic contact with the silicon at the end walls of the grooves and at the surfaces of the ridges, the silicide-forming metal not reacting with the underlying silicon oxide layer on the side walls; and

removing the unreacted silicide-forming metal overlying the silicon oxide layer on the side walls while leaving the metal silicide in ohmic contact with the silicon at the end walls of the grooves and at the surfaces of the ridges.

2. The method in accordance with claim 1 wherein heating comprises

subjecting the wafer to a rapid thermal annealing treatment to cause the silicide-forming metal to react with the underlying silicon at the metal-silicide interfaces to form metal silicide.

3. The method in accordance with claim 2 wherein

said silicide-forming metal is selected from the group consisting of cobalt, nickel, titanium, tantalum, tungsten, and molybdenum.

4. The method in accordance with claim 3 wherein

said silicide-forming metal is cobalt which reacts with silicon to form cobalt silicide.

5. The method in accordance with claim 4 wherein

heating to cause the cobalt to react with the underlying silicon comprises heating at a temperature between 700°

C. and 900°

C. for a period of from 4 seconds to 40 seconds.

6. The method in accordance with claim 5 wherein

cobalt is desposited to form a layer approximately 60 to 80 nanometers thick.

7. The method in accordance with claim 6 including subsequent to removing the unreacted cobalt the step of

forming a layer of conductive metal on the cobalt silicide.

8. The method in accordance with claim 1 wherein introducing conductivity type imparting material of the opposite conductivity type into the silicon at the end walls of said grooves includes

forming a layer of silicon oxide on the exposed silicon surfaces including the side walls and end walls of said grooves;

ion implanting conductivity the imparting material of the opposite conductivity type through the silicon oxide on the end walls of said grooves and into the silicon at the end walls; and

heating to cause the implanted conductivity type imparting material of the opposite conductivity type to diffuse and convert said zones of silicon of the one conductivity type of relatively high resistivity to the opposite conductivity type;

and wherein removing all protective material includes removing all of said layer of silicon oxide.

9. The method in accordance with claim 8 wherein heating comprises

subjecting the wafer to a rapid thermal annealing treatment to cause the silicide-forming metal to react with the underlying silicon at the metal-silicon interfaces to form metal silicide.

10. The method in accordance with claim 9 wherein

said silicide-forming metal is selected from the group consisting of cobalt, nickel, titanium, tantalum, tungsten, and molybdenum.

11. The method in accordance with claim 10 wherein

said silicide-forming metal is cobalt which reacts with silicon to form cobalt silicide.

12. The method in accordance with claim 11 wherein

heating to cause the cobalt to react with the underlying silicon comprises heating at a temperature between 700°

C. and 900°

C. for a period of from 4 seconds to 40 seconds.

13. The method in accordance with claim 12 wherein

cobalt is deposited to form a layer approximately 60 to 80 nanometers thick.

14. The method in accordance with claim 13 including subsequent to removing the unreacted cobalt the step of

forming a layer of conductive metal on the cobalt silicide.