Method of manufacturing semiconductor device having polycrystalline silicon layer with metal silicide film

• US 4,716,131 A
• Filed: 11/28/1984
• Issued: 12/29/1987
• Est. Priority Date: 11/28/1983
• Status: Expired due to Term

• Current Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Original Assignee: NEC Corporation
• Inventors: Hirano, Yoshiyuki, Okazawa, Takeshi
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): Quach, T. N.
• Application Number:
  US06/675,768
• Time in Patent Office: 1,126 Days
• Field of Search: 29/589, 29/590, 29/591, 29/571, 148/DIG. 147, 437/93, 357/23.1, 357/23.7
• US Class Current: 438/586
• CPC Class Codes: H01L 21/32105 Oxidation of silicon-containing layers
• CPC Class Codes: H01L 21/76889 by forming silicides of refractory metals
• CPC Class Codes: H01L 29/66575 where the source and drain or source and drain extensions are self-aligned to the sides of the gate H01L29/66606 takes precedence
• CPC Class Codes: Y10S 257/90 MOSFET type gate sidewall insulating spacer
• CPC Class Codes: Y10S 438/911 Differential oxidation and etching

Abstract

A metal silicide film is formed on the sides of a polycrystalline silicon layer formed on a semiconductor substrate via an insulating film and the surface of the metal silicide film is covered by a silicon oxide film, whereby the silicon layer has a low electrical resistance and no short-circuiting is necessary. For example, in an insulated gate field effect transistor, the gate electrode is constituted by the polycrystalline silicon layer and the metal silicide film at the side walls of the polycrystalline silicon layer. Such a gate electrode has a low electrical resistance and does not cause undesirable short-circuiting with source and drain regions by the existence of the silicon oxide film formed on the surface of the metal silicide film. Also, other metal silicide film may be formed on the upper surface of the gate electrode. Moreover the silicide-SiO₂ structure may be used on the source and drain regions.

Claims

1. A method of manufacturing a semiconductor device comprising steps of forming a first silicon oxide film on the major surface of a single crystal silicon substrate, forming a polycrystalline silicon layer on said first silicon oxide film, forming an oxidation resisting layer on said polycrystalline silicon film, patterning said oxidation resisting film and said polycrystalline silicon layer, depositing a first metal film continuously on an exposed side surface of the patterned polycrystalline silicon layer and on an exposed major surface of said substrate in the vicinity of said patterned polycrystalline silicon layer via said first silicon oxide film, performing a heat treatment to form a first metal silicide film at said exposed side surface of said patterned polycrystalline silicon layer and a second metal silicide film at said exposed major surface of said substrate and to leave a portion of said first metal film on said first silicon oxide film unconverted into metal silicide, removing said portion of said first metal film left unconverted into metal silicide from the surface of said first silicon oxide film between said first and second metal silicide films to separate said first metal silicide film from said second metal silicide film, performing thermal oxidation to convert surface portions of said first and second metal silicide films into second oxide films, and thereafter removing said oxidation resisting film to expose said upper surface of said patterned polycrystalline silicon layer, depositing a second metal film on the whole surface including said upper surface of said polycrystalline silicon layer from which said oxidation resisting film has been removed, applying a heat treatment to form a third metal silicide film on said upper surface of said silicon layer, and removing said second metal film at the regions where said second metal silicide is not formed.

2. A method of claim 1, in which said metal film is made of molybdenum, tungsten, titanium or tantalum.