Streamlined digital signal processor
First Claim
1. A processor connected to a source of time-division multiplexed (TDM) digital signals, a destination of TDM digital signals and a dual PCM channel, having a central control responsive to signals received from an external device, said central control cyclically processes instructions and generates control signals therefrom, said processor further comprising:
- an arithmetic logic unit (ALU) responsive to said control signals;
a first bidirectional data bus connected to said ALU and said source of TDM digital signals; and
a second bidirectional data bus connected to said ALU and said PCM channel;
whereby said TDM signals are received from said source by said ALU via said first data bus and processed by said ALU in response to said signals received from said external device and transmitted by said ALU via said second data bus over said dual PCM channel.
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Accused Products
Abstract
An all-digital signal processor (DSP) is disclosed which performs pulse code modulation (PCM) coding and decoding (CODEC) filter operations for both received and transmitted signals, among other functions. A user can access various programmable registers via the microprocessor to specify parameters used in the execution of programs by the DSP. Two 19-bit wide bidirectional data busses are provided for time-division multiplexed communication between various elements, which include a random access memory (RAM), an arithmetic-logic unit (ALU), and an interface to a receive-side analog-to-digital (A/D) converter and a transmit-side digital-to-analog (D/A) converter. A programmed logic array (PLA) executes microcode which controls the processing of signals by the ALU section. A variety of other operations can be performed under control of the PLA such as generation of dual-tone multi-frequency (DTMF) signals commonly used in telecommunications. The architecture of the DSP provides a number of user-accessible registers for the storage of parameters and coefficients used in the generation of the DTMF signals, in the CODEC filtering, and in the compression and expansion of signals. The design of the general-purpose DSP is readily expandible to accomodate additional circuit elements and/or more signals to be processed in parallel.
115 Citations
9 Claims
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1. A processor connected to a source of time-division multiplexed (TDM) digital signals, a destination of TDM digital signals and a dual PCM channel, having a central control responsive to signals received from an external device, said central control cyclically processes instructions and generates control signals therefrom, said processor further comprising:
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an arithmetic logic unit (ALU) responsive to said control signals; a first bidirectional data bus connected to said ALU and said source of TDM digital signals; and a second bidirectional data bus connected to said ALU and said PCM channel; whereby said TDM signals are received from said source by said ALU via said first data bus and processed by said ALU in response to said signals received from said external device and transmitted by said ALU via said second data bus over said dual PCM channel. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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Specification