Zero-IF receiver wih feedback loop for suppressing interfering signals

• US 4,718,113 A
• Filed: 04/21/1986
• Issued: 01/05/1988
• Est. Priority Date: 05/08/1985
• Status: Expired due to Fees

• Current Assignee: Alcatel SA (Nokia Corporation)
• Original Assignee: Alcatel NV (Nokia Corporation)
• Inventors: Moster, Manfred, Wiechert, Dieter, Rother, Dietrich
• Primary Examiner(s): NOT, DEFINED
• Assistant Examiner(s): Seidenglanz, Elissa
• Application Number:
  US06/854,278
• Time in Patent Office: 624 Days
• Field of Search: 455/207, 455/208, 455/209, 455/303, 455/304, 455/306, 455/314, 455/315, 455/324, 455/302, 375/77, 329/50, 329/124, 307/520
• US Class Current: 455/209
• CPC Class Codes: H03D 3/002 Modifications of demodulators to reduce interference by undesired signals H03D3/248 takes precedence
• CPC Class Codes: H03D 3/007 by converting the oscillations into two quadrature related signals H03D3/245 takes precedence
• CPC Class Codes: H03D 7/163 the local oscillations of at least two of the frequency changers being derived from a single oscillator
• CPC Class Codes: H03D 7/165 at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22

Abstract

A working on the zero IF principle is disclosed which contains a feedback circuit instead of a preselector for suppressing interfering signals. The interfering signals contained in the incoming signal (F_E) are separated from the useful signal by filters in the baseband. They are then reconverted to the RF value, amplified, and substracted from the incoming signal (F_E) by a subtracter (S1). In the steady state, the output of the subtracter (S1) provides the useful signal, which is converted into the baseband and then fed to a signal processor (SV).

Claims

1. A radio receiver for receiving an incoming input signal having an associated carrier frequency, said receiver comprising

an oscillator for producing first and second oscillator signals differing in phase by 90°

and having the same frequency as the carrier of the input signal;

a subtractor having subtractor first and second inputs and a subtractor output, said incoming signal being coupled to said first subtractor input;

first and second primary mixers each having primary mixer first and second inputs and a primary mixer output, the primary mixer first inputs being coupled to the subtractor output and the respective first and second primary mixer second inputs being coupled to the respective first and second oscillator signals;

first and second high-pass filters each having a high-pass filter input and high-pass filter output, the respective first and second high-pass filter inputs being coupled to the respective first and second primary mixer outputs;

first and second secondary mixers each having secondary mixer first and second inputs and a secondary mixer output, the respective first and second secondary mixer first inputs being coupled to the respective first and second oscillator signals and the respective first and second secondary mixer second inputs being coupled to the respective first and second high-pass filter outputs;

an adder having adder first and second inputs respectively coupled to the respective first and second secondary mixer outputs, said adder also having an adder output coupled to said subtractor second input, said subtractor subtracting the error signal output by said adder from the incoming signal to form the input signal to said primary mixers; and

a signal processor for further signal processing of the signals output by the first and second primary mixers.

2. The receiver of claim 1 further comprising an amplifier having an amplifier input connected to said adder output, said amplifier also having an amplifier output, connected to said subtractor second input.

3. A receiver as claimed in claim 1, characterized in that the signal processor (SV) contains a demodulator and is implemented in digital and/or analog technology.

4. A receiver as claimed in claim 1, characterized in that at least part of the adders and/or subtracters are realized with transformers or low-noise amplifiers.

5. A radio receiver for receiving an incoming input signal having an associated carrier frequency, said receiver comprising

an oscillator for producing first and second oscillator signals differing in phase 90°

and having the same frequency as the carrier of the input signal;

a primary subtractor having primary subtractor first and second inputs and a subtractor output, said incoming signal being coupled to said primary subtractor first input;

first and second primary mixers each having primary mixer first and second inputs and a primary mixer output, the primary mixer first inputs being coupled to each other and to the primary subtractor output and the respective first and second primary mixer second inputs being coupled to the respective first and second oscillator signals;

first and second low-pass filters each having a low-pass filter input and a low-pass filter output, the respective first and second low-pass filter inputs being coupled to the respective first and second primary mixer outputs;

first and second secondary mixers each having secondary mixer first and second inputs and a secondary mixer output, the respective first and second secondary mixer first inputs being coupled to the respective first and second oscillator signals and the respective first and second secondary mixer second inputs being coupled to the respective first and second low-pass filter outputs for mixing the low-pass-filtered signal with the oscillator signals differing in phase by 90°

;

an adder having adder first and second inputs respectively coupled to the respective first and second secondary mixer outputs, said adder also having an adder output;

an amplifier having an amplifier input coupled to said adder output, said amplifier also having an amplifier output;

a secondary subtractor having a second subtractor first input coupled to said amplifier output and a secondary subtractor second input coupled to said primary subtractor output, said secondary subtractor also having a secondary subtractor output for outputting an error signal,

said primary subtractor subtracting the error signal output by said secondary subtractor from the incoming signal to form the input signal to said primary mixers, the outputs of the low-pass filters being fed to a signal processor for further signal processing off.

6. A receiver as claimed in claim 5 characterized in that it is employed in a radio transceiver, with the low-pass filters, the additional mixers, the adder and the amplifier (V1) being used as a converter stage during transmission.

7. The receiver of claim 5 further comprising a first amplifier having a first amplifier input connected to said adder output, said first amplifier also having a first amplifier output connected to said second subtractor second input;

and

a second amplifier having an second amplifier input connected to said second subtractor output, said second amplifier also having a second amplifier output connected to said first subtractor second input.