Overcurrent protective circuit for modulated-conductivity type MOSFET

• US 4,719,531 A
• Filed: 05/15/1986
• Issued: 01/12/1988
• Est. Priority Date: 05/15/1985
• Status: Expired due to Term

• Current Assignee: Toshiba Mitsubishi-Electric Industrial Systems Corporation (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Yamaguchi, Yoshihiro, Nakagawa, Akio, Okado, Chihiro
• Primary Examiner(s): Pellinen, A. D.
• Assistant Examiner(s): DeBoer, Todd E.
• Application Number:
  US06/863,515
• Time in Patent Office: 607 Days
• Field of Search: 361/18, 361/56, 361/86, 361/89, 361/91, 361/101, 361/88, 361/93, 361/94, 361/98, 361/100, 361/57, 323/276, 330/207 D
• US Class Current: 361/86
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H03K 17/08128 in composite switches
• CPC Class Codes: H03K 17/0828 in composite switches
• CPC Class Codes: H03K 17/567 Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT

Abstract

An overcurrent protective circuit for a modulated conductivity type MOSFET, i.e., a BIFET, which has a voltage detection circuit for detecting a voltage between the drain and source of the BIFET and a main switching circuit for lowering a voltage between the gate ad source of the BIFET and preventing the failure of the BIFET and delay of turn-on of the BIFET according to the output of the voltage detection circuit. The protective circuit produces a constant time delay before the main switching circuit becomes turned on during the initial turn-on period of the BIFET upon application of an ON-gate signal to the gate of the BIFET. The protection circuit thereby prevents, during the initial turn period of the BIFET, a situation where the main switching circuit is turned on but the BIFET is not turned on. The protective circuit further assures that after detection of an overvoltage across the source and drain of the BIFET as may be caused by a load failure, the BIFET gate is maintained at such a low voltage to assure at most a small current conduction through the BIFET even if a ringing voltage occurs across the BIFET.

Claims

1. An overcurrent protective circuit including a BIFET having a source, a drain, and a gate connected to an output terminal of a gate signal generating circuit, comprising:

first voltage detection means for detecting a voltage between the drain and source of said BIFET; and

main switching means for instantaneously lowering a voltage between the gate and source of said BIFET according to the output of said voltage detection means and for preventing the failure of turn-on and the delay of turn-on of said BIFET, comprising;

a thyristor having an anode, a cathode and a gate, said anode connected to the gate of said BIFET;

a first zener diode connected to the gate of said thyristor;

a first MOSFET having a drain connected to the cathode of said thyristor, a source connected to the source of said BIFET, and a gate;

a first resistor means connected between the gate of said first MOSFET and said output terminal of said gate signal generating circuit, said first MOSFET having a gate capacitance which in combination with said first resistor means results in a delay in turn-on of said first MOSFET until after turn-on of said BIFET upon application of a turn-on signal to said output terminal of said gate signal generating circuit.

2. An overcurrent protective circuit according to claim 1, wherein the time constant of the first resistor means and the gate capacitance of said first MOSFET is predetermined so as to maintain said first MOSFET in the off-state during a period in which an ON-gate signal is not applied to the gate of said BIFET and during an initial turn-on period after application of the ON-gate signal until the voltage between the drain and source of said BIFET is lowered by at least 10% compared to that before application of the ON-gate signal to the gate of the BIFET.

3. An overcurrent protective circuit according to claim 1, wherein said first resistor means comprises:

a resistor connected between the output terminal of said gate signal generating circuit and the gate of said first MOSFET.

4. An overcurrent protective circuit according to claim 1, further comprising:

a photo coupler connected between the gate of said BIFET and the anode of said thyristor.

5. An overcurrent protective circuit according to claim 1, further comprising:

a subswitching means for lowering a voltage between the gate and source of said BIFET and preventing failure of said BIFET and delay of turn-on of said BIFET; and

a second voltage detection means for detecting a voltage between the drain and source of said BIFET and having an output terminal connected to said subswitching means.

6. An overcurrent protective circuit according to claim 5, further comprising:

a first zener diode connected between the drain and source of said first MOSFET for preventing an overvoltage.

7. An overcurrent protective circuit according to claim 6, wherein said subswitching means comprising:

a bipolar transistor having a base, a collector and an emitter, the collector of which is connected to the gate of said BIFET;

a second zener diode connected between the base of said bipolar transistor and the output terminal of said second voltage detection means;

a second MOSFET having a gate and gate capacitance, a drain connected to the emitter of said bipolar transistor, and a source connected to the source of said BIFET; and

a second resistor means connected to the gate of said second MOSFET.

8. An overcurrent protective circuit according to claim 7, wherein said second resistor means comprises:

a first resistor connected between the output terminal of said gate signal generating circuit and the gate of said second MOSFET.

9. An overcurrent protective circuit including a BIFET having a source, a drain, and a gate connected to an output terminal of a gate signal generating circuit, comprising:

first voltage detection means for detecting a voltage between the drain and source of said BIFET; and

main switching means for instantaneously lowering a voltage between the gate and source of said BIFET according to the output of said voltage detection means and for preventing the failure of turn-on and the delay of turn-on of said BIFET;

wherein said main switching means comprises;

a first MOSFET having a source, a drain, and a gate connected to the source of said BIFET;

a first diode connected between the gate of said BIFET and the drain of said first MOSFET;

first resistor means connected between the gate of said first MOSFET and the output terminal of said voltage detection means, said first MOSFET having a gate capacitance which in combination with said first resistor means results in a delay in turn-off of said first MOSFET after a lowering of the drain voltage of said BIFET; and

short-circuiting means for short-circuiting the output terminal of said voltage detections means to a predetermined potential during an off-period and a specified intitial turn-on period of said BIFET under the control of an output of said gate signal generating circuit so that turn-on of said BIFET occurs before turn-on of said first MOSFET during said initial turn-on period.

10. An overcurrent protective circuit according to claim 9, wherein said first resistor means comprises:

a resistor and a second diode connected in parallel with said resistor.

11. An overcurrent protective circuit according to claim 9, further comprising:

a photo-coupler connected between the gate of said BIFET and the anode of said first diode.

12. An overcurrent protective circuit according to claim 9, wherein said short-circuiting means comprising:

a second MOSFET for short-circuiting the output terminal of said voltage detection means to said predetermined potential;

a MOS INVERTER including a third MOSFET having a source, a drain and a gate and gate capacitance, said source and drain thereof connected across the gate and drain of said second MOSFET, and a second resistor means connected between the output terminal of said gate signal generating circuit and the gate of said third MOSFET.

13. An overcurrent protective circuit according to claim 12, wherein said second resistor means comprises:

a second resistor connected between the output terminal of said gate signal generating circuit and the gate of said third MOSFET.

14. An overcurrent protective circuit according to claim 13, further comprising:

a zener diode connected between the drain and source of said second MOSFET for preventing an overvoltage.