AC-DC converter triggered by variable frequency pulses

• US 4,719,552 A
• Filed: 11/14/1986
• Issued: 01/12/1988
• Est. Priority Date: 11/22/1985
• Status: Expired due to Fees

• Current Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Original Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Inventors: Wegener, Fritz A., Albach, Manfred
• Primary Examiner(s): BEHA JR, WILLIAM
• Application Number:
  US06/930,821
• Time in Patent Office: 424 Days
• Field of Search: 363/44, 363/45, 363/82, 363/89, 363/90, 363/126, 363/81, 323/222, 323/282, 323/299, 323/300, 323/285
• US Class Current: 363/44
• CPC Class Codes: H02M 1/4225 using a non-isolated boost converter
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A circuit arrangement for producing a direct voltage from a sinusoidal input voltage comprising a filter for suppressing interference voltages, a rectifier, a switched mode power supply part and a pulse generator. The pulse generator produces from the rectified input signal switching pulses for the switched mode power supply part. The frequency of these pulses is varied so that it is a minimum at the maximum value of the rectified input voltage and is a maximum at the minimum value and is varied between the extreme values so that the second derivative of the frequency with respect to time is always zero or negative. A switching pulse is terminated when a signal proportional to the output current of the rectifier exceeds the difference between a signal proportional to the rectified input voltage and an integrated signal proportional to the output current of the rectifier.

Claims

1. A circuit arrangement for forming a direct voltage from an essentially sinusoidal input voltage comprising:

a filter for suppressing high-frequency interference signals, a switched mode power supply which includes a diode, a coil, a capacitor and a transistor and is coupled to the filter through a rectifier, the power supply elements being connected so that in the conductive state of the transistor the diode is cut off and coil current flows at least through the transistor and in the cut-off state the current flows through the diode and a parallel arrangement of a load and the capacitor, and a pulse generator responsive to the input voltage to form switching pulses for the transistor whose frequency is varied uniformly in time between a minimum frequency at a maximum value of the rectified input voltage and a maximum frequency at the minimum value, characterized in that the pulse generator comprises, a voltage-to-frequency converter responsive to the input voltage to form starting pulses which determine the beginning of the switching pulses and whose frequency is varied between the minimum and maximum values such that the second derivative of the frequency with respect to time is always zero or negative, a first integrator which produces an integrated output signal proportional to the output current of the rectifier and whose time constant is larger than the reciprocal value of the minimum frequency, a superposition circuit forming an output signal equal to the difference between a signal proportional to the rectified input voltage and the output signal of the first integrator, and a first comparison circuit which produces a signal for terminating a switching pulse when a signal proportional to the output current of the rectifier exceeds the output signal of the superposition circuit.

2. A circuit arrangement as claimed in claim 1, characterized in that the voltage-to-frequency converter comprises a second comparison circuit comparing a reference voltage with a voltage proportional to the rectified input voltage, a monostable trigger element activated by the second comparison circuit when the reference voltage is larger than said voltage proportional to the rectified input voltage, a second integrator which integrates an output signal of the monostable trigger element and whose time constant is larger than the reciprocal value of the frequency of the input voltage, and a voltage-controlled oscillator controlled by the second integrator thereby to produce the starting pulses.

3. A circuit arrangement as claimed in claim 1 wherein the pulse generator comprises a trigger element which produces the switching pulses and to which the starting pulses and the signal of the first comparison circuit are supplied.

4. A circuit arrangement as claimed in claim 1 wherein the superposition circuit comprises an amplifier having a non-inverting input to which is supplied the signal proportional to the rectified input voltage and an inverting input connected via a first resistor to the output of the superposition circuit and to a second resistor connected to the output of the first integrator.

5. A circuit arrangement as claimed in claim 1 characterized in that a voltage divider is coupled between the superposition circuit and the first comparison circuit.

6. A circuit arrangement as claimed in claim 1 characterized in that the coil is connected to the rectifier and to the transistor and through the diode to the parallel arrangement of the load and the capacitor.

7. A circuit arrangement as claimed in claims 1, characterized in that the transistor is connected to the rectifier and to the diode and through the coil to the parallel arrangement of the load and the capacitor.

8. A circuit arrangement as claimed in claim 1, characterized in that the transistor is connected to the rectifier and to the coil and through the diode to the parallel arrangement of the capacitor and the load.

9. A circuit arrangement as claimed in claim 2 wherein the pulse generator comprises a further trigger element which produces the switching pulses and to which the starting pulses and the signal of the first comparison circuit are supplied.

10. A circuit arrangement as claimed in claim 2 wherein the superposition circuit comprises an ampifier having a non-inverting input to which is supplied the signal proportional to the rectified input voltage and an inverting input connected via a first resistor to the output of the superposition circuit and to a second resistor connected to the output of the first integrator.