Packet fastbus

• US 4,719,621 A
• Filed: 07/15/1985
• Issued: 01/12/1988
• Est. Priority Date: 07/15/1985
• Status: Expired due to Fees

• Current Assignee: Raytheon Company (Rtx Corporation)
• Original Assignee: Raytheon Company (Rtx Corporation)
• Inventors: May, David C.
• Primary Examiner(s): Olms, Douglas W.
• Assistant Examiner(s): Scutch, III, Frank M.
• Application Number:
  US06/755,113
• Time in Patent Office: 911 Days
• Field of Search: 370/85, 370/88, 370/94, 370/94 U, 340/825.5
• US Class Current: 370/402
• CPC Class Codes: G06F 13/4027 using bus bridges G06F13/4022 takes precedence
• CPC Class Codes: G06F 13/4031 with arbitration
• CPC Class Codes: G06F 13/4213 with asynchronous protocol
• CPC Class Codes: H04N 7/152 Multipoint control units therefor

Abstract

A digital system comprising a synchronous fastbus for interconnecting a cluster of devices such as processors and for interconnecting a plurality of said clusters. Information is transferred over the synchronous fastbus using a parallel digital word information packet. All required bus control signals including acknowledge and non-acknowledge signals take place within the same packet transfer fastbus cycle time. A command information packet is transferred over the fastbus separately from a response information packet thereby leaving the fastbus free until a response packet is returned to the requestor. During the interim other devices are allowed to access the fastbus, thereby increasing significantly fastbus utilization.

Claims

1. In combination:

a plurality of devices, each of said devices comprising means for generating an information packet;

a first synchronous bus means for interconnecting said plurality of devices forming a cluster and for transferring said information packet on said bus means within one clock cycle time, said generating means of said devices receiving a packet transfer acknowledge signal within said one clock cycle time;

a bus coupler means coupled to said first synchronous bus means and a second synchronous bus means for storing and forwarding said information packet to a specified destination in accordance with said information packet.

2. The combination as recited in claim 1 wherein:

said bus coupler means further comprises means for controlling a bidirectional flow of a plurality of information packets to and from said bus coupler means.

3. The combination as recited in claim 1 wherein:

said information packet comprises a parallel digital word having a plurality of fields, one of said fields performing node identification of each of said plurality of devices.

4. The combination as recited in claim 1 wherein:

said bus coupler means further comprises means for determining said specified destination of said information packet in accordance with an address field of said information packet.

5. The combination as recited in claim 1 wherein

said bus coupler means comprises a first-in first-out memory means for temporarily storing a plurality of information packets.

6. The combination as recited in claim 1 wherein:

said bus coupler means further comprises arbiter means for determining which one of said devices obtains first use of said first synchronous bus means, said bus coupler means having the highest priority use of said first synchronous bus.

7. In combination:

a plurality of devices, each of said devices comprising means for generating an information packet;

a first synchronous bus means for interconnecting said plurality of devices forming a cluster and for transferring said information packet on said bus means within one clock cycle time, said generating means of said devices receiving a packet transfer acknowledge signal within said one clock cycle time;

a bus coupler means having a first port coupled to said first synchronous bus means for storing and forwarding said information packet to a specified destination; and

a second synchronous bus means coupled to a second port of said bus coupler means for routing said information packet to and from said bus coupler means.

8. The combination as recited in claim 7 wherein:

said bus coupler means comprises a third port for routing said information packet to a storing means.

9. The combination as recited in claim 7 wherein:

said bus coupler means further comprises means for controlling a bidirectional flow of a plurality of information packets to and from said bus coupler means.

10. The combination as recited in claim 7 wherein:

said information packet comprises a parallel digital word having a plurality of fields, one of said fields performing node identification of each of said plurality of devices.

11. The combination as recited in claim 7 wherein:

said bus coupler means further comprises means for determining a destination of said information packet in accordance with an address field of said information packet.

12. The combination as recited in claim 7 wherein:

said bus coupler means comprises a first-in first-out memory means for temporarily storing a pluality of information packets.

13. The combination as recited in claim 7 wherein:

said bus coupler means comprises a first arbiter means for determining when one of said devices in said cluster obtains first use of said first synchronous bus means and a second arbiter means for determining when said information packet is transferred to or from said bus coupler means on said second synchronous bus means.

14. A digital system comprising:

a synchronous system fastbus means for routing an information packet within said digital system;

a plurality of clusters interconnected by said system fastbus means;

each of said clusters comprising a plurality of devices interconnected by a synchronous cluster fastbus means for transferring said information packet on said cluster fastbus means within one clock cycle time, said devices receiving a packet transfer acknowledge signal within said one clock cycle time; and

a bus coupler means in each of said clusters connected between said cluster fastbus means and said system fastbus means for storing said information packet and routing said information packet to a destination in said digital system within one clock cycle time.

15. The digital system as recited in claim 14 wherein:

said bus coupler means comprises a port for routing said information packet to a storing means.

16. The digital system as recited in claim 14 wherein:

said bus coupler means further comprises means for controlling a bidirectional flow of said information to and from said system fastbus means and said cluster fastbus means.

17. The digital system as recited in claim 14 wherein:

said information packet comprises a parallel digital word having a plurality of fields, one of said fields being an address field for determining a destination node for said information packet.

18. The digital system as recited in claim 17 wherein:

said plurality of fields within said information packet comprises a message type field for enabling one of said devices in one of said clusters to send a message to any other device in said digital system or to all devices simultaneously in said digital system.

19. The digital system as recited in claim 14 wherein:

said bus coupler means comprises a first-in first-out memory means for temporarily storing a plurality of information packets.

20. The digital system as recited in claim 14 wherein:

said bus coupler means in each of said clusters comprises a first arbiter means for determining which one of said devices in each of said clusters obtains use of said cluster fastbus and a second arbiter means for determining when said bus coupler means obtains use of said system fastbus.

21. The digital system as recited in claim 14 wherein:

said cluster fastbus means comprises an interface to each of said plurality of devices further comprising;

a transmit control means for controlling the transfer of an information packet from one of said plurality of devices to said bus coupler means; and

a receive control means for controlling the transfer of an information packet from said bus coupler means to one of said plurality of devices.

22. The digital system as recited in claim 14 wherein:

said bus coupler means comprises a first interface to said cluster fastbus means and a second interface to said system fastbus means, each of said first interface and said second interface comprising;

a transmit control means for controlling the transfer of an information packet from said bus coupler means; and

a receive control means for controlling the transfer of an information packet to said bus coupler means.

23. A method of transferring parallel digital information among a plurality of devices arranged in clusters within a digital system comprising the steps of:

generating in a first one of said plurality of devices an information packet comprising a plurality of fields including address, data and control fields;

transferring said information packet on a synchronous cluster fastbus means interconnecting said plurality of devices within one clock cycle time;

receiving at said first one of said generating devices a packet transfer acknowledge signal within said one clock cycle time; and

storing and forwarding said information packet in a bus coupler means coupled to a synchronous system fastbus means, said bus coupler means having at least a first port and a second port for receiving and forwarding said information packet.

24. The method as recited in claim 23 wherein:

said step of storing and forwarding said information packet comprises forwarding said information packet to said synchronous system fastbus for transfer to a second one of said plurality of devices in one of said clusters, said transfer on said system fastbus occurring within one clock cycle time.