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High speed program store with bootstrap

  • US 4,720,812 A
  • Filed: 05/30/1984
  • Issued: 01/19/1988
  • Est. Priority Date: 05/30/1984
  • Status: Expired due to Fees
First Claim
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1. A digital signal processing system which automatically loads program instructions from a non-volatile memory means into a main memory means upon initialization, said system comprising:

  • data bus means for communicating signals associated with program instructions;

    address bus means for communicating address signals;

    first non-volatile memory means connected to said data bus means and to said address bus means for retaining a first plurality of program instructions and for applying first signals associated with said first plurality of program instructions to said data bus means in response to the presence of first address signals on said address bus means;

    second non-volatile memory means connected to said data bus means for retaining a second plurality of program instructions and for applying second signals associated with said second plurality of program instructions to said data bus means in response to a first control signal;

    programmable main memory means, connected to said data bus means and to said address bus means and also connected to receive read and write control signals, for storing program instructions associated with signals appearing on said data bus means in response to the presence of second address signals on said address bus means and in response to generation of a write control signal, and for applying the signals associated with said program instructions stored therein to said data bus means in response to presence of second address signals on said address bus means and in response to generation of a read control signal; and

    processing means, connected to said data bus means, said address bus means, said main memory and said first memory means, said processing means capable of directly addressing storage locations within said main memory means and said first memory means via said address bus means, for performing the followingn functions upon initialization;

    (1) applying first address signals to said address bus means;

    (2) generating said first control signal in response to the presence on said data bus means of said first signals applied thereto by said first memory means, thereby controlling said second memory means to apply said second signals to said data bus means;

    (3) applying second address signals to said address bus means and generating said write control signal so as to control said main memory means to store program instructions associated with said second signals;

    (4) applying second address signals to said address bus means and generating said read control signal so as to control said main memory means to apply to said data bus means the signals associated with said program instructions stored therein; and

    (5) performing tasks specified by said stored program instructions in response to said sigtnals applied to said data bus means by said main memory means.

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