Matrix-type display panel and driving method therefor

• US 4,724,433 A
• Filed: 11/12/1985
• Issued: 02/09/1988
• Est. Priority Date: 11/13/1984
• Status: Expired due to Term

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Inoue, Hiroshi, Yamashita, Shinichi
• Primary Examiner(s): Birmiel, Howard A.
• Application Number:
  US06/796,755
• Time in Patent Office: 819 Days
• Field of Search: 340/805, 340/784, 340/802
• US Class Current: 345/208
• CPC Class Codes: G09G 2310/0248 Precharge or discharge of column electrodes before or after applying exact column voltages
• CPC Class Codes: G09G 2310/0297 Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

A matrix-type display panel comprises a display panel having a plurality of scanning lines, a plurality of data lines and a plurality of picture elements disposed at each intersection of the scanning lines and data lines, and analog switching elements for sampling-and-holding information signals which are applied to the data lines in synchronism with scanning signals applied to the scanning lines. The matrix-type display panel is driven by a driving method comprising: applying such switching pulses to the analog switching elements that time-serial pulses among them and shifted in phase from each other and overlap each other in a same duration.

Claims

1. A driving method for a matrix-type display panel of the type comprising a display panel having a plurality of scanning lines, a plurality of data lines and a plurality of picture elements disposed at each intersection of the scanning lines and data lines, and analog switching elements for sampling-and-holding information signals which are applied to the data lines in synchronism with scanning signals applied to the scanning lines, wherein said analog switching elements are divided into first and second groups of analog switching elements which are connected to a first shift register and a second shift register respectively, said driving method comprising the step of:

successively applying switching pulses to said analog switching elements so that a pair of switching pulses successively applied to an analog switching element in said first group and an analog switching element in said second group, respectively, are sequenced so that said pair of switching pulses at least partially overlap each other in time.

2. The driving method according to claim 1, wherein said switching pulses are supplied from a shift register constituted by C-MOS.

3. The driving method according to claim 1, wherein said analog switching element is constituted by a thin film transistor connected with a sample-holding capacitor.

4. The driving method according to claim 1, wherein said time-serially applied switching pulses have a phase difference of 90°

from each other.

5. The driving method according to claim 1, wherein said time-serially applied switching pulses have a phase difference of 45°

from each other.

6. The driving method according to claim 1, wherein said information signals are image signals.

7. The driving method according to claim 1, wherein said display panel is an active matrix-type display panel.

8. The driving method according to claim 1, wherein said data lines comprise even and odd numbered data lines, wherein said first group of analog switching elements are each connected to an odd-numbered data line, and said second group of analog switching elements are each connected to an even-numbered data line.

9. The driving method according to claim 1, wherein said first group of analog switching elements includes a sub-group of analog switching elements connected to 1st, 5th, 9th, . . . and (4n-3)th data lines, respectively, and a sub-group of analog switching elements connected to 2nd, 6th, 10th, . . . and (4n-2)th data lines, and wherein said second group of analog switching elements includes a sub-group of analog switching elements connected to 3rd, 7th, 11th, . . . and (4n-1)th data lines, and a sub-group of analog switching elements connected to 4th, 8th, 12th, . . . and (4n)th data lines, wherein n is an integer.

10. A matrix-type display panel, comprising:

a display panel having a plurality of scanning lines, a plurality of data lines divided into a first group and a second group, and a plurality of picture elements disposed at each intersection of the scanning lines and the data lines;

a first group of analog switching elements each connected to one of the first group of data lines, and a second group of analog switching elements each connected to one of the second group of data lines;

a first group of sample-and-hold capacitors each connected to one of the first group of analog switching elements, and a second group of sample-and-hold capacitors each connected to one of the second group of analog switching elements;

a first shift register connected to and supplying switching pulses to said first group of analog switching elements, and a second shift register connected to and supplying switching pulses to said second group of analog switching elements; and

means for providing a pair of successively applied switching pulses from said first and second shift registers, respectively, such that said pair of successively applied switching pulses at least partially overlap in time.

11. The matrix-type display panel according to claim 10, wherein said shift register is constituted by C-MOS.

12. The matrix-type display panel according to claim 10, wherein said analog switching elements are constituted by thin film transistors.

13. The matrix-type display panel according to claim 10, wherein said first shift register includes a shift register connected to 1st, 5th, 9th, . . . and (4n-3)th data lines and a shift register connected to 2nd, 6th, 10th, . . . and (4n-2)th data lines, and wherein said second shift register includes a shift register connected to 3rd, 7th, 11th, . . . and (4n-1)th data lines, and a shift register connected to 4th, 8th 12th . . . and (4n)th data lines, wherein n is an integer.

14. The matrix-type display panel according to claim 10, wherein said first shift register is associated with odd-numbered data lines and said second shift register is associated with even-numbered data lines.