Method and apparatus for the protection of D.C. motors under stalled conditions
First Claim
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1. A circuit for detecting the stalled condition of a D.C. motor comprising:
- means for selectively applying D.C. voltage to said motor;
means for sensing the flow of current through said D.C. motor and providing an output voltage having a level corresponding to said sensed current;
means for establishing a first reference voltage level corresponding to a level of output voltage that is above a level corresponding to the sensed current through said D.C. motor in its normal run condition and below a level corresponding to the sensed current through said D.C. motor in its stalled condition;
means for comparing said output voltage with said first reference voltage level and producing a stall signal whenever said output voltage is greater than said first reference voltage level;
means for timing the occurrence of said stall signal and producing a blanking signal of a predetermined duration whenever said stall signal is continuous for a first predetermined period of time; and
means responsive to said blanking signal for inhibiting the application of D.C. voltage to said motor for the duration of said blanking signal,wherein said timing means includes;
means for establishing a second reference voltage level which is less than said first reference voltage level and above a level of output voltage that corresponds to the sensed current through said D.C. motor in its normal run condition;
means for comparing said output voltage with said second reference voltage level and producing a run signal whenever said output signal is greater than said second reference signal;
means responsive to the initial portion of said stall signal and providing a delay timing pulse having a duration equal to said first predetermined period of time;
bistable means having a set state and a reset state respectively responsive to the end portion of said delay timing pulse and the initial portion of said run signal; and
gating means responsive to the simultaneous occurrence of said stall signal and said bistable means in its set state for commencing the generation of said blanking signal.
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Abstract
A technique for detecting the occurrence of stall currents in a D.C. motor control circuit and inhibiting the application of drive currents to the motor by monitoring the current flow through the motor and responding to stall currents that are continuous for a predetermined period of time.
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Citations
5 Claims
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1. A circuit for detecting the stalled condition of a D.C. motor comprising:
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means for selectively applying D.C. voltage to said motor; means for sensing the flow of current through said D.C. motor and providing an output voltage having a level corresponding to said sensed current; means for establishing a first reference voltage level corresponding to a level of output voltage that is above a level corresponding to the sensed current through said D.C. motor in its normal run condition and below a level corresponding to the sensed current through said D.C. motor in its stalled condition; means for comparing said output voltage with said first reference voltage level and producing a stall signal whenever said output voltage is greater than said first reference voltage level; means for timing the occurrence of said stall signal and producing a blanking signal of a predetermined duration whenever said stall signal is continuous for a first predetermined period of time; and means responsive to said blanking signal for inhibiting the application of D.C. voltage to said motor for the duration of said blanking signal, wherein said timing means includes; means for establishing a second reference voltage level which is less than said first reference voltage level and above a level of output voltage that corresponds to the sensed current through said D.C. motor in its normal run condition; means for comparing said output voltage with said second reference voltage level and producing a run signal whenever said output signal is greater than said second reference signal; means responsive to the initial portion of said stall signal and providing a delay timing pulse having a duration equal to said first predetermined period of time; bistable means having a set state and a reset state respectively responsive to the end portion of said delay timing pulse and the initial portion of said run signal; and gating means responsive to the simultaneous occurrence of said stall signal and said bistable means in its set state for commencing the generation of said blanking signal. - View Dependent Claims (2, 3)
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4. A method of automatically protecting a D.C. motor against excessive current in its stalled condition, comprising the steps of:
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defining means for selectively applying D.C. voltage to said motor; sensing the flow of electrical current through said D.C. motor; providing an output voltage corresponding in value to said sensed current; establishing a first reference voltage level corresponding in value to a level of output voltage that is above a level corresponding to the sensed current through said D.C. motor in its normal run condition and below a level corresponding to the sensed current through said D.C. motor in its stalled condition; comparing said output voltage with said first reference voltage; producing a stall signal whenever said step of comparing indicates said output voltage exceeds said first reference voltage; timing the occurrence of said stall signal over a first predetermined period of time; establishing a second reference voltage level which is below said first reference voltage level and above a level of output voltage that corresponds to the sensed current through said D.C. motor in its normal run condition; comparing said output voltage with said second reference voltage; producing a run signal whenever said second step of comparing indicates said output voltage exceeds said second reference voltage; providing a delay timing pulse for a duration equal to said first predetermined period of time in response to the initial portion of said stall signal; providing a bistable means having a set state and a reset state connected to receive and being respectively responsive to the end portion of said delay timing pulse and to the initial portion of said run signal; producing a blanking signal for a second predetermined duration only when said bistable means is in its said set state and said stall signal is present at the end of said first predetermined period of time, and inhibiting the application of said D.C. voltage to said motor for the duration of said blanking signal. - View Dependent Claims (5)
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Specification