FET power converter with reduced switching loss

• US 4,727,308 A
• Filed: 08/28/1986
• Issued: 02/23/1988
• Est. Priority Date: 08/28/1986
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Newton, Stephen F., Huljak, Robert J., Wallace, Kenneth A.
• Primary Examiner(s): BEHA JR, WILLIAM
• Application Number:
  US06/901,350
• Time in Patent Office: 544 Days
• Field of Search: 323/224, 323/222, 323/282, 323/283, 323/285, 323/288, 323/351, 307/571, 307/584
• US Class Current: 323/222
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A DC to DC power converter having reduced switching loss for operation at high frequencies. As disclosed, a buck, or forward, converter includes a first FET as the switching device in series with an inductor and a second FET as the flywheel device. At the common node to which the two FET'"'"'s and the inductor are connected, there is sufficient capacitance that the FET'"'"'s may be turned off without appreciable voltage change across the FET'"'"'s. The value of the inductor is chosen, with respect to the input and output voltages and frequencies of operation involved, to insure that the inductor current polarity reverses each cycle, raising the node voltage to the level of the input voltage, substantially eliminating turn-on losses of the first FET. Control circuitry is provided for regulation of the power converter to control the peak-to-peak current in the inductor and to insure that at least a selected minimum value of the inductor current is present for each cycle of operation of the converter. An over-voltage protection circuit for the output of the converter is also provided.

Claims

1. A method for converting a DC voltage at a source to a DC voltage of a different value at an output, comprising the steps of:

supplying current from the source through an inductor, which is coupled to the source, by turning on a semiconductor switch coupled to the inductor at a node;

turning off the semiconductor switch;

supplying current from the inductor to the output via conduction through a semiconductor device which is coupled to the node;

supporting the voltage at the output with an energy storage device which receives the current from the inductor via conduction through the semiconductor device which is coupled to the node;

permitting the voltage at the output to effect a reversal of current flow through the inductor for a sufficient time to alter the voltage at the node so that there is substantially no voltage across the semiconductor switch; and

turning on the semiconductor switch after the current in the inductor has reversed direction, altering the voltage at the node so that there is substantially no voltage across the semiconductor switch when it is turned on.

2. The method of claim 1 in which the step of supplying current from the inductor to the output comprises turning on the semiconductor device which is coupled to the node when there is substantially no voltage across the semiconductor device.

3. A power converter comprising an input couplable to a DC voltage source, an output couplable to a DC voltage load, a first FET and an inductor connected in series between the input and the output and connected at a node, the first FET being operable to be gated on to conduct current in a forward direction from the input through the first FET to the node and having an internal diode permitting current flow in a reverse direction from the node through the FET to the input, a second FET connected between circuit common and the node and being operable to be gated on to conduct current in a forward direction from the node to circuit comon and having an internal diode permitting the flow of current from circuit common to the node, means for gating on the first FET, means for gating off the first FET after a selected peak-to-peak current change in the current through the first FET, means for gating on the second FET after the first FET has been gated off while current is flowing through the internal diode of the second FET and the inductor to the output and before the current in the inductor has reversed, means for gating off the second FET after the current in the inductor has reversed and is flowing from the output through the inductor and the second FET to circuit common, the means for gating on the first FET being operable to gate on the first FET after reverse current through the inductor has raised the voltage at the node substantially to the level of the input voltage after the second FET has been gated off.

4. The power converter of claim 3 which further comprises means for maintaining the second FET gated on for a sufficient time after current reversal in the inductor to insure that after the second FET is gated off that the voltage at the node will rise to at least the level of the input voltage.

5. A power converter comprising an input couplable to a DC voltage source, an output couplable to a DC voltage load, an inductor coupled to the input and to the output, a first semiconductor switch coupled in series with the inductor having (a) a conductive condition in which current flows from the input through the inductor and the first semiconductor switch and (b) a non-conductive condition, a second semiconductor switch coupled in series with the inductor having (a) a conductive condition in which current flows through the inductor and the second semiconductor switch to the output and (b) a non-conductive condition, and means for alternately placing the first and the second semiconductor switches in a conductive condition for times which are proportional to the value of the inductance of the inductor and inversely proportional to the voltage across the inductor when each switch is in its conductive condition.

6. The power converter of claim 6 which further comprises means for establishing a limit value for a peak of the inductor current.

7. A method for converting a DC voltage at a source to a DC voltage of a lesser value at an output, comprising the steps of:

supplying current from the source, through a first controlled switch and an inductor connected to the first controlled switch at a junction point, to the output by turning on the first controlled switch;

turning off the first controlled switch, stopping the flow of current from the source through the first controlled switch and the inductor to the output;

permitting current flow through the inductor to the output through a second controlled switch connected to the junction point between the first controlled switch and the inductor;

supporting the voltage at the output with an energy storage device which receives the current from the inductor;

permitting the voltage at the output to effect reversal of current flow through the inductor for a sufficient time to alter the voltage at the junction point so that there is substantially no voltage across the first controlled switch;

turning off the second controlled switch after current flow through the inductor and the second controlled switch has reversed direction to flow from the output to the junction point, to produce a voltage increase at the junction point; and

turning on the first controlled switch after the current flowing in a reverse direction through the inductor has raised the voltage at the junction point so that there is substantially no voltage across the first controlled switch when it is turned on.

8. A method for converting a DC voltage at a source to a DC voltage of a lesser value at an output, comprising the steps of:

supplying current from the source, through a first FET and an inductor connected to the first FET at a node to the output, the first FET being operable to couple current in a forward direction from the source to the node when the first FET is gated on and having an internal diode permitting the flow of current in a reverse direction;

gating off the first FET, stopping the flow of current from the source through the first FET in the forward direction;

supplying current from the inductor to the output by conduction through a second FET which is connected between circuit common and the node, the second FET being operable to couple current in a forward direction from the node to circuit common when the second FET is gated on and having an internal diode permitting current flow in a reverse direction;

gating on the second FET;

permitting the voltage at the output to effect a reversal of current flow through the inductor so that current flows from the output through the inductor and the second FET to circuit common;

gating off the second FET after current has reversed in the inductor, permitting the rise of voltage at the node; and

gating on the first FET after the reverse current in the inductor has raised the node voltage so that there is substantially no voltage across the first FET when it is gated on.

9. A power converter comprising an input couplable to a DC voltage source, an output couplable to a DC voltage load, a first semiconductor switch connected to the input having (a) a conductive condition in which current can flow from the input through the first semiconductor, an inductor connected at a first end to the first semiconductor switch at a node and having a second end connected to the output, a second semiconductor switch connected between circuit common and the node having (a) a conductive condition in which current can flow through the second semiconductor switch and (b) a non-conductive condition, and means for alternately placing the first and second semiconductor switches in a conductive condition, the first semiconductor switch being in a conductive condition for a time proportional to the inductance of the inductor and inversely proportional to the difference between the voltage at the DC voltage source and the voltage at the DC voltage load, and the second semiconductor switch being in a conductive condition for a time proportional to the inductance of the inductor and inversely proportional to the voltage at the DC voltage load.

10. The power converter of claim 9 which further comprises means for establishing a limit value for one of the peaks of the inductor current.

11. A method for converting a DC voltage at a source to a DC voltage of a greater value at an output, comprising the steps of:

supplying current from the source, through an inductor and a first FET connected to the inductor at a node to circuit common, the first FET being operable to couple current in a forward direction from the node to circuit common when the first FET is gated on and having an internal diode permitting the flow of current in a reverse direction;

gating off the first FET, stopping the flow of current from the node through the first FET in the forward direction;

supplying current from the inductor to the node effecting the rise of voltage at the node;

gating on a second FET which is connected between the node and the output, the second FET being operable to couple current in a reverse direction from the node to the output through an internal diode when the voltage at the node is greater than the voltage at the output, and the second FET being operable to couple current in a forward direction from the output to the node when the second FET is gated on;

gating on the second FET while current is flowing through the second FET from the node to the output, so that current is subsequently permitted to flow from the output through the second FET to the node;

gating off the second FET after current has reversed in the second FET, after permitting the rise of voltage at the node and reversing the flow of current through the inductor, so that the reverse current flow through the inductor reduces the voltage at the node to the level of circuit common; and

gating on the first FET after the reverse current in the inductor has lowered the node voltage so that there is substantially no voltage across the first FET when it is gated on.

12. A power converter comprising an input couplable to a DC voltage source, an output couplable to a DC voltage load, an inductor and a first FET connected in series between the input and circuit common and connected at a node, the first FET being operable to be gated on to conduct current in a forward direction from the node through the first FET to circuit common and having an internal diode permitting current flow in a reverse direction from circuit common through the first FET to the node, a second FET connected between the node and the output and being operable to be gated on to conduct current in a forward direction from the output to the node and having an internal diode permitting the flow of current from the node to the output, means for gating on the first FET, means for gating off the first FET after a selected peak-to-peak current change in the current through the first FET, means for gating on the second FET after the first FET has been gated off while current is flowing through the internal diode of the second FET to the output and before the current in the second FET has reversed, means for gating off the second FET after the current in the second FET has reversed and is flowing from the output through the second FET to the node, after raising the voltage at the node and reversing the direction of current flow through the inductor, the voltage at the node falling to circuit common after the second FET is gated off, the means for gating on the first FET being operable to gate on the first FET after reverse current through the inductor has lowered the voltage at the node substantially to the level of circuit common.

13. The power converter of claim 12 which further comprises means for maintaining the second FET gated on for a sufficient time after current reversal in the second FET to insure that after the second FET is gated off that the voltage at the node falls to the level of circuit common.

14. A method for converting a DC voltage at a source to a DC voltage of a different value at an output, comprising the steps of:

supplying current from the source, through a first FET and an inductor connected to the first FET at a node to circuit common, the first FET being operable to couple current in a forward direction from the source to the node when the first FET is gated on and having an internal diode permitting the flow of current in a reverse direction;

gating off the first FET, stopping the flow of current from the source through the first FET in the forward direction;

supplying current from the inductor to circuit common by conduction through a second FET which is connected between the output and the node, the second FET being operable to couple current in a forward direction from the node to the output when the second FET is gated on and having an internal diode permitting current flow in a reverse direction;

gating on the second FET prior to current reversal in the inductor, so that after current reversal current is permitted to flow from the output through the inductor to circuit common;

gating off the second FET after current has reversed in the inductor, permitting the rise of voltage at the node; and

gating on the first FET after the reverse current in the inductor has raised the node voltage so that there is substantially no voltage across the first FET when it is gated on.

15. A power converter comprising an input couplable to a DC voltage source, an output couplable to a DC voltage load, a first FET and an inductor connected in series between the input and circuit common and connected at a node, the first FET being operable to be gated on to conduct current in a forward direction from the input through the first FET to the node and having an internal diode permitting current flow in a reverse direction from the node through the FET to the input, a second FET connected between the output and the node and being operable to be gated on to conduct current in a forward direction from the node to the output and having an internal diode permitting the flow of current from the output to the node, means for gating on the first FET, means for gating off the first FET after a selected peak-to-peak current change in the current through the first FET, means for gating on the second FET after the first FET has been gated off while current is flowing through the internal diode of the second FET and the inductor from the output to circuit common and before the current in the inductor has reversed, means for gating off the second FET after current in the inductor has reversed and is flowing from circuit common through the inductor in the second FET to the output, the means for gating on the first FET being operable to gate on the first FET after reverse current through the inductor has raised the voltage at the node substantially at the level of the input voltage after the second FET has been gated off.

16. The power converter of claim 15 which further comprising means for maintaining the second FET gated on for a sufficient time after current reversal in the inductor to insure that after the second FET is gated off the voltage at the one will rise to at least the level of the input voltage.