Frequency doubler

• US 4,734,591 A
• Filed: 04/14/1986
• Issued: 03/29/1988
• Est. Priority Date: 04/26/1985
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Ichitsubo, Ikuroh
• Primary Examiner(s): Miller, Stanley D.
• Assistant Examiner(s): Callahan, Timothy P.
• Application Number:
  US06/851,161
• Time in Patent Office: 715 Days
• Field of Search: 307/219.1, 307/271, 307/529, 307/304, 328/15, 328/20, 333/218, 363/159, 363/163
• US Class Current: 327/122
• CPC Class Codes: H03B 19/14 by means of a semiconductor device

Abstract

A frequency doubler is disclosed in which an input signal is supplied to the respective gates of first and second field effect transistors with a phase difference corresponding to a one half wave of the input signal and a signal of a doubler frequency wave is obtained from the drain of the second field effect transistor.

Claims

1. A frequency doubler comprising:

a first field effect transistor having a gate, a source, a drain and a current channel provided between the source and drain;

a second field effect transistor having a gate, a source, a drain and a current channel provided between the source and drain, the current channels of the first and second field effect transistors being connected in series with each other; and

means for applying across the gate and source of the first field effect transistor and across the gate of the second field effect transistor and the source of the first field effect transistor signal voltages having substantially the same voltage amplitudes and frequencies and having a phase difference of about 180 degrees;

wherein an output signal having a frequency two times that of said signal voltages is obtained from the drain of said second field effect transistor.

2. A frequency doubler according to claim 1, in which said first and second field effect transistors are comprised of a single dual gate field effect transistor structure.

3. A frequency doubler according to claim 1, wherein said signal voltage applying means includes a phase shifting means which is comprised of a line path having a length corresponding to a one-half wavelength of that of said applied signal voltage.

4. A frequency doubler according to claim 1, wherein said signal voltage applying means includes a phase shifting means which is comprised of a third field effect transistor having a gate, a drain and a source, for inverting a phase of the signal voltage supplied to its gate, the drain being connected to the gate of said second field effect transistor and the source being connected to ground.

6. A frequency doubler according to claim 1, wherein said first and second field effect transistors are comprised of a signal dual gate field effect transistor structure.

5. A frequency doubler comprising:

a first field effect transistor having a gate, a source, a drain and a current channel provided between the source and drain;

a second field effect transistor having a gate, a source, a drain and a current channel provided between the source and drain, the current channels of the first and second field effect transistors being connected in series with each other;

means for applying a first signal voltage across the gate and source of the first field effect transistor; and

means for applying a second signal voltage across the source of the first field effect transistor and the gate of the second field effect transistor, the second signal voltage having substantially the same voltage and frequency and having a phase difference of about 180 degrees with respect to the first signal voltage;

wherein an output signal having a frequency two times that of each of said first and second signal voltages is obtained from the drain of said second field effect transistor.

7. A frequency doubler according to claim 5, wherein said first and second field effect transistors are comprised of a single dual gate field effect transistor structure.