Circuit for detecting and suppressing pulse-shaped interferences

• US 4,736,163 A
• Filed: 07/17/1985
• Issued: 04/05/1988
• Est. Priority Date: 07/23/1984
• Status: Expired due to Fees

• Current Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Original Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Inventors: Berkhout, Petrus J., Rijnsburger, Johan M.
• Primary Examiner(s): Miller, Stanley D.
• Assistant Examiner(s): Callahan, Timothy P.
• Application Number:
  US06/756,140
• Time in Patent Office: 993 Days
• Field of Search: 307/354, 307/356, 307/358, 328/150, 328/162, 328/111, 328/112, 328/114, 328/116, 328/117
• US Class Current: 327/58
• CPC Class Codes: G01R 19/04 Measuring peak values or amplitude or envelope of ac or of pulses
• CPC Class Codes: G01R 19/16585 for individual pulses, ripple or noise and other applications where timing or duration is of importance G01R19/16519, G01R19/16538 and G01R19/16595 take precedence; for pulse duration and rise time, see G01R29/02 and subgroups
• CPC Class Codes: H03G 3/345 Muting during a short period of time when noise pulses are detected, i.e. blanking H03G3/348 takes precedence
• CPC Class Codes: H03K 5/04 by increasing duration; by decreasing duration
• CPC Class Codes: H03K 5/153 Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant switching at zero crossing H03K17/13

Abstract

The circuit arrangement for detecting pulse-shaped interferences in an electrical signal comprises an input (7), a high-pass filter (8) having a cut-off frequency lying between 40 Hz and 1000 Hz, one or two signal paths (25, 25'"'"') and an output (5). A signal path (25) comprises a peak detector (10), a device (11) for determining a running average value, of its input signal, a delay unit (12) and a comparator (15). The output of the peak detector (10) is coupled via the device (11) for determining a running average value to a first input (13) of the comparator and via the delay unit (12) to a second input (14) of the comparator. The comparator compares the delayed output signal of the peak detector with the output signal of the device for determining the running average value and supplies an output signal to its output (16) if the output signal of the peak detector is larger than a times the output signal of the device for determining the running average value, where it holds that a>1. With this circuit arrangement, a more satisfactory detection of pulse-shaped interferences is attained (FIG. 3). The circuit arrangement may be used, for example, as a detector circuit in an arrangement for detecting and suppressing pulse-shaped interferences. (FIG. 1).

Claims

1. A circuit for detecting pulse-shaped interferences in an electrical signal comprising:

an input terminal for receiving the electrical signal;

a high-pass filter coupled to the input terminal;

an output terminal for supplying an output signal; and

,

at least one signal path coupling said output terminal and high-pass filter comprising;

a peak detector, having an input connected to an output of said high-pass filter for producing an output signal having a relatively short build-up time so that relatively rapidly it becomes representative of of a peak value in the electrical signal applied to said input, and a relatively long decay time so that it decays relatively slowly thereafter;

a device for determining an average value having an input coupled to an output of the peak detector for determining a running average value of the output signal of the peak detector, and for supplying an output signal representative of the running average value;

a comparator having a first and a second input coupled to receive the output signal of the device for determining an average value and to receive the output signal of the peak detector, respectively, for comparing the output signal of the peak detector with the output signal of the device for determining an average value and for supplying to said output terminal output signal representative of the result of comparing.

2. A circuit as claimed in claim 1, wherein the high-pass filter has a cut-off frequency lying between 40 Hz and 1000 Hz and a delay unit is coupled between the output of the peak detector and the second input of the comparator.

3. A circuit as claimed in claim 1, wherein the comparator supplies an output signal if the absolute value of the output signal of the peak detector exceeds a times the absolute value of the running average value of the output signal of the peak detector, a being a constant for which it holds that a >

1.

4. A circuit as claimed in claim 1, wherein a rectifier is connected between the output of the high-pass filter and the input of the peak detector.

5. A circuit as claimed in claim 1, further comprising a pulse former coupled between the output of the comparator and the output terminal and having an output for supplying a pulse each time when a pulse-shaped interference is detected by the comparator.

6. A circuit as claimed in claim 5 wherein a pulse lengthening device is coupled to the output of the pulse former for lengthening the pulses of the pulse former up to a given minimum pulse width and for lengthening the pulses of the pulse former by a value corresponding to a time interval between pulse-shaped interferences and succeeding pulse-shaped interferences only if said times interval is smaller than said minimum pulse width.

7. A circuit as claimed in claim 6, wherein a low-pass filter is coupled to an output of the pulse lengthening device.

8. A circuit as claimed in claim 1, wherein the peak detector comprises a first and a second signal combination unit, the input of the peak detector being coupled, through a first amplifir stage, to a first input of both the first and the second signal combination unit, an output of the first signal combination unit being coupled through a device for determining an absolute value to a second input of the second signal combination unit, and an output of the second signal combination unit being coupled to the output of the peak detector and through a delay element and a second amplifier stage to both a second input of the first signal combination unit and a third input of the second signal combination unit.

9. A circuit as claimed in claim 5, wherein the pulse former comprises a first and second signal combination unit, an input of the pulse former being coupled to a first input and through a delay element to a second input of the first signal combination unit, and in that an output of the first signal combination unit is coupled, through an amplifier stage to a first input of the second signal combination unit and through a device for determining an absolute value to a second input of the second signal combination unit, the second signal combination unit having an output coupled to the output of the pulse former.

10. A circuit as claimed in claim 6, wherein the pulse lengthening device comprises a first and a second pulse combination unit and a limiter, an input of the pulse lengthening device is coupled to a first input of the first signal combination unit, an output of the first signal combination unit is coupled through the limiter, a delay element and an amplifier stage to a second input of the first signal combination unit, and an output of the limiter is coupled to a first input of the second signal combination unit, of which a second input receives a constant signal and an output of which is coupled to an output of the pulse lengthening device.

11. A circuit for detecting pulse-shaped interferences in an electrical signal comprising:

(a) an input terminal for receiving the electrical signal;

(b) a high-pass filter coupled to the input terminal;

(c) an output terminal for supplying an output signal;

(d) at least first and second signal paths extending in parallel each coupled to an output of the high-pass filter, each path comprising;

(i) a peak detector having an input connected to the output of said high-pass filter for producing an output signal having a relatively short build-up time so that relatively rapidly it becomes representative of the value of the peak value in the signal applied to said input, and a relatively long decay time, so that it decays relatively slowly thereafter, the peak detector in the first signal path being constructed to detect peaks of one polarity in its input signal, and the peak detector in the second signal path being constructed to detect peaks of the other polarity in its input signal;

(ii) a device for determining an average value having an input coupled to an output of the peak detector for determining a running average value of the output of the peak detector, and for supplying an output signal representative of said running average value; and

(iii) a comparator having a first and second input coupled to receive the output signal of the device for determining an average value and to receive an output signal of the peak detector, respectively, for comparing the output signal of the peak detector with an output signal of the device for determining an average value and for supplying an output signal representative of the result of comparing; and

(e) a combination circuit having a first and second input coupled to an output of the comparator in one signal path and to an output of the comparator in another signal path, respectively, for combining the output signals of the comparators, an output of the combination circuit being coupled to the output terminal.

12. A circuit as claimed in claim 11, wherein the combination circuit comprises a signal combination unit having a first and a second input coupled to the first and the second input of the combination circuit as well as an output, and a pulse former coupled to the output of the signal combination unit for supplying a pulse each time a pulse-shaped interference is detected by one of the comparators.

13. A circuit for detecting and suppressing pulse-shaped interferences in an electrical signal comprising:

(a) a first input terminal for receiving the electrical signal;

(b) an output terminal;

(c) a suppressor section coupled between the input terminal and the output terminal having a control input for receiving a control signal, said suppressor section suppressing the electrical signal at said output terminal in response to the control signal;

(d) a circuit for detecting pulse-shaped interferences comprising;

(i) a second input terminal for receiving the electrical signal;

(ii) a high-pass filter coupled to the second input terminal;

(iii) an output coupled to the control input of the suppressor section, for supplying the control signal to the control input of the suppressor section; and

(iv) at least one signal path coupling said high-pass filter to said output of said circuit for detecting pulse-shaped interferences comprising;

(A) a peak detector, having an input connected to an output of said high-pass filter for producing an output signal having a relatively short build-up time so that relatively rapidly it becomes representative of the value of a peak value in the electrical signal applied to said second input and a relatively long decay time so that it decays relatively slowly thereafter;

(B) a device for determining an average value, having an input coupled to an output of the peak detector, for determining a running average value of the output signal of the peak detector, and for supplying an output signal representative of said running average value; and

(C) a comparator having a first and second input coupled to receive the output signal of the device for determining an average value and to receive an output signal of the peak detector, respectively, for comparing the output signal of the peak detector with an output signal of the device for determining an average value and for supplying an output signal representative of comparing to the output of said circuit for detecting pulse-shaped interferences.