Depletion-mode FET for the regulation of the on-chip generated substrate bias voltage

• US 4,739,191 A
• Filed: 04/27/1981
• Issued: 04/19/1988
• Est. Priority Date: 04/27/1981
• Status: Expired due to Fees

• Current Assignee: Signetics Corporation
• Original Assignee: Signetics Corporation
• Inventors: Puar, Deepraj S.
• Primary Examiner(s): Miller, Stanley D.
• Assistant Examiner(s): HUDSPETH, DAVID R
• Application Number:
  US06/258,156
• Time in Patent Office: 2,549 Days
• Field of Search: 307/297, 307/296 A, 307/296 R, 307/304, 307/200 B, 323/313
• US Class Current: 327/536
• CPC Class Codes: G05F 3/205 Substrate bias-voltage generators for static stores G11C5/146

Abstract

An on-chip regulated substrate bias voltage generator for an MOS integrated circuit includes a ring oscillator (10) for developing a true signal and its complement. The signals are applied to a charge pump (12) that includes two capacitors (C1 and C2) and a plurality of rectifiers (22, 24, and 26). The charge pump produces a substrate bias voltage (V_BB) which is supplied to the gate of a depletion-mode field-effect transistor (28) whose source receives a reference voltage (V_SS). The transistor forms part of a control circuit (14) coupled to the ring oscillator. In the N-channel case, the charge pumping action on the substrate drives the substrate bias negative until it reaches the sum of the reference voltage and threshold voltage of the depletion-mode transistor. This enables the control circuit to control the operation of the ring oscillator so as to regulate the substrate bias voltage.

Claims

1. In an integrated circuit having a semiconductor substrate, a voltage generator for providing a substrate bias voltage for the substrate, the voltage generator comprising:

a depletion-mode field-effect transistor having a source for receiving a reference voltage, a gate for receiving the bias voltage, and a drain;

a ring oscillator comprising an odd number of at least three inverters serially arranged in a ring, the inverters providing a pair of complementary signals that repetitively vary when the transistor is conductive;

a charge pump responsive to the complementary signals as they repetitively vary for pumping the bias voltage to a value (1) less than the sum of the reference voltage and the threshold voltage of the transistor where it is N-channel type or (2) greater than the sum of the reference voltage and the threshold voltage of the transistor where it is P-channel type; and

means for stopping the oscillator from oscillating when the transistor is non-conductive so that the bias voltage (1) increases where the transistor is N-channel type or (2) decreases where the transistor is P-channel type.

2. A voltage generator as in claim 1 wherein the means for stopping disables the oscillator in response to the voltage at the drain of the transistor when it is non-conductive.

3. A voltage generator as in claim 2 wherein the means for stopping comprises a like-polarity enhancement-mode field-effect transistor having a source for receiving the reference voltage, a gate coupled to the drain of the depletion-mode transistor, and a drain coupled to the oscillator.

4. A voltage generator as in claim 3 further including a load device coupled to the drain of the depletion-mode transistor.

5. A voltage generator as in claim 4 wherein the load device comprises a like-polarity resistively-connected depletion-mode field-effect transistor.

6. A voltage generator as in claim 4 wherein the load device comprises a resistor.

7. A voltage generator as in claim 4 wherein one of the complementary signals is provided from a node between one pair of the inverters, the other of the complementary signals is provided from a node between another pair of the inverters, and the drain of the enhancement-mode transistor is coupled to a node between a pair of the inverters.

8. A voltage generator as in claim 2 wherein the charge pump comprises:

a first rectifier having one end coupled to a voltage supply;

a second rectifier having one end coupled to the other end of the first rectifier so as to be forwardly in series therewith, the other end of the second rectifier being coupled to a substrate node at which the bias voltage is provided to the substrate;

a first capacitor having a pair of plates of which one is coupled to one end of the second rectifier and the other receives one of the complementary signals; and

a second capacitor having a pair of plates of which one is coupled to the other end of the second rectifier and the other receives the other of the complementary signals.

9. A voltage generator as in claim 8 wherein the charge pump further includes a third rectifier forwardly coupled between the second rectifier and the substrate node.

10. A voltage generator as in claim 9 wherein each rectifier is a like-polarity diode-connected field-effect transistor.