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Depletion-mode FET for the regulation of the on-chip generated substrate bias voltage

  • US 4,739,191 A
  • Filed: 04/27/1981
  • Issued: 04/19/1988
  • Est. Priority Date: 04/27/1981
  • Status: Expired due to Fees
First Claim
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1. In an integrated circuit having a semiconductor substrate, a voltage generator for providing a substrate bias voltage for the substrate, the voltage generator comprising:

  • a depletion-mode field-effect transistor having a source for receiving a reference voltage, a gate for receiving the bias voltage, and a drain;

    a ring oscillator comprising an odd number of at least three inverters serially arranged in a ring, the inverters providing a pair of complementary signals that repetitively vary when the transistor is conductive;

    a charge pump responsive to the complementary signals as they repetitively vary for pumping the bias voltage to a value (1) less than the sum of the reference voltage and the threshold voltage of the transistor where it is N-channel type or (2) greater than the sum of the reference voltage and the threshold voltage of the transistor where it is P-channel type; and

    means for stopping the oscillator from oscillating when the transistor is non-conductive so that the bias voltage (1) increases where the transistor is N-channel type or (2) decreases where the transistor is P-channel type.

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