Programmable cycle meter

• US 4,742,297 A
• Filed: 10/01/1986
• Issued: 05/03/1988
• Est. Priority Date: 07/08/1985
• Status: Expired due to Term

• Current Assignee: Technologies Holdings Corporation (Teleflex Incorporated)
• Original Assignee: Teleflex Incorporated
• Inventors: O'Rourke, Timothy J., Heaton, Robert J.
• Primary Examiner(s): Eisenzopf, Reinhard J.
• Assistant Examiner(s): Solis, Jose M.
• Application Number:
  US06/913,946
• Time in Patent Office: 580 Days
• Field of Search: 73/2, 324/160, 324/166, 324/174, 324/163, 360/73, 377/110
• US Class Current: 324/166
• CPC Class Codes: G01P 21/02 of speedometers
• CPC Class Codes: G01P 3/48 by measuring frequency of generated current or voltage in general G01R23/00

Abstract

A programmable cycle meter assembly (17,117) for monitoring a cycling member by receiving an input signal from a transducer (13,113) proportional to the cycles of the monitored member and for indicating various cycle rates by a speedometer or tachometer (36) in linear proportion to a linear array of corresponding frequencies. The assembly includes a circuit (17, 117) which is characterized by a switchable filter means (12,112) which filters out unwanted frequencies above a predetermined frequency of the input signal from the transducer (13,113). a switchable divider (20,120) is used for adjustably dividing the input signal for changing the proportion of the frequency by variable a predetermined ratio to produce a repetitive rate (24,124). A fixed frequency to voltage converter (28,128) converts the repetitive rate adjusted frequency signal (24,124) into a proportional voltage for indicating cycle rate on a meter (36) for various configurations of the cycling member.

Claims

1. A programmable cycle meter assembly (10) for monitoring a cycling member to provide accurate meter readings for various configurations affecting the cycling member, said assembly (10) comprising;

display means (36) for indicating various cycle rates, input signal means (13,

     113) for producing an input signal with frequency proportional to cycle repetition of a monitored cycling member, a switchable filter means (12,

     112) for filtering out frequencies in said input signal which are above a predetermined frequency producing a filtered frequency signal and for adjustment to different predetermined frequencies, adjustment means (15,

     115) for changing the frequency of said filtered frequency signal from said switchable filter means (12,

     112) by a predetermined ratio to produce a repetitive rate adjusted frequency signal (24,

     124), a frequency to voltage converter (28,

     128) for converting said adjusted frequency signal (24,

     124) into a drive signal applied to said display means (36) for indicating cycle rate to provide accurate meter readings for various configurations affecting said cycling member.

2. An assembly as set forth in claim 1 including an input amplifier means (14, 114) for amplifying the magnitude of said filtered frequency signal from said switchable filter means (12, 112) to a predetermined potential level producing the amplified input signal.

3. An assembly as set forth in claim 2 wherein said adjustment means (15, 115) includes a switchable frequency divider (20, 120) for dividing said amplified input signal from said input amplifier means (14,114) to said adjusted frequency signal (24,124) with a frequency proportional to said input signal.

4. An assembly as set forth in claim 3 further including a fixed signal conditioner (26,126) for receiving said adjusted frequency signal to operate said frequency to voltage converter (28,128).

5. An assembly as set forth in claim 4 further characterized by said switchable filter (12,112) including a series of filter resistors (R1-R4, R102-R105) for receiving said array of input frequencies, a series of filter switches (S1-S3, S102-S104) wherein one is parallel with one of said series of filter resistors R1-R4, R102-R105) for closing and opening to obtain a required impedance resistance of said filter (12,112), first and second filter capacitors (C1, C2, C101, C102) connected to the output of said series of resistors R1-R4, R102-R106), and a parallel switch (S4, S101) in series with and between the first of said filter capacitors (C2, C101) for changing the total capacitance of said filter (12,112) wherein said total resistance and said capacitance determines the cutoff frequency above which are unwanted frequencies of said filter (12,112).

6. An assembly as set forth in claim 5 further characterized by said switchable frequency divider (20,120) including a counter (40,140) for dividing said amplified input signal, a series of divider resistors (R23-R30, R110-R112) and respective divider switches (S5-S12, S106-S108) receiving said divided signal for determining said predetermined ratio to produce said adjusted frequency signal (24,124).

7. An assembly as set forth in claim 6 further characterized by said fixed signal conditioner (26) including monostable multivibrator means (26) for squaring said adjusted frequency signal to operate said fixed frequency to voltage converter (28).

8. An assembly as set forth in claim 7 wherein said adjustment means (15) includes a gate (22) for receiving the output from said switchable frequency divider means (20) producing said repetitive rate adjusted frequency (24).

9. An assembly as set forth in claim 8 including a frequency multipler means (16,18) to receives said filtered frequency signal for increasing resolution and for producing an amplifier frequency signal.

10. An assembly as set forth in claim 9 further including a fixed counter (34) for indicating total cycles of said cycling member.

11. An assembly as set forth in claim 10 further including a fixed frequency divider means (44) for dividing said adjusted frequency signal by a fixed ratio for operation of said fixed counter (34).

12. An assembly as set forth in claim 11 including driver means (30) to supply current gain between said fixed frequency divider means (44) and said fixed counter (34).

13. An assembly as set forth in claim 12 further characterized by said switchable filter means (12) including said series filter resistors (R1, R2, R3, R4), said series of filter switches (S1, S2, S3), said first and second filter capacitors (C1, C2), said parallel switch (S4), for selectively filtering out unwanted frequencies, a fifth resistor (R5) and a pair of diodes (D7, D6) for limiting the voltage level, wherein said series of filter resistors (R1-R4) includes four resistors and said series of filter switches (S1-S3) includes three switches.

14. An assembly as set forth in claim 13 further characterized by said fixed divider means (34) including a counter (44) connected to the output of said gate (22) for generating a signal to operate said counter (34).

15. An assembly as set forth in claim 14 further characterized by said input amplifier (14) including an amplifier (36), a sixth resistor (R6) interconnecting the input op-amp (36) and the ground potential, and a seventh resistor (R7) as feedback.

16. An assembly as set forth in claim 15 further characterized by said doubler means (16,18) including a doubler op-amp (38), a differentiating circuit including a third capacitor (C3) and eighth resistor (R8), a half wave rectifier with a first (D1) and a ninth resistor (R9), and two biasing resitors (R10, R11) for multiplying the input frequency by a factor of two.

17. An assembly as set forth in claim 6 including programmable gain adjust switches (12) for varying the gain of said frequency to voltage converter (128) to operate said meter (36).

18. An assembly as set forth in claim 17 further characterized by said fixed signal conditioner (126) including a squaring amplifier for amplifying said repetitive rate adjusted frequency (124) to drive said frequency to voltage converter (128).

19. An assembly as set forth in claim 18 further characterized by said switchable filter (112) including a zener diode (D101) and first diode (D102) in parallel with said filter capacitors (C102).

20. An assembly as set forth in claim 19 further characterized by said input amplifier means (114) including a first operational amplifier (136), a first biasing resistor (R107) connected to the first diode (D102) and said first operational amplifier (136), a second biasing resistor (R108) connected to said first op-amp (136) and ground, a third biasing resistor (R9) in series with a fifth switch (s105) and a power supply for determining the differential of the first operational amplifier (136).

21. An assembly as set forth in claim 20 further characterized by said perogrammable gain adjust switch (129) including a series of seven resistors (R127, R128, R129, R130, R131, R132, R133) and six switches (S109, S110, S111, S112, S113, S114) with each parallel and across each of six of said series of seven resistors (R128, R129, R130, R131, R132, R133) and connected to said frequency to voltage converter (128) for adjusting the gain of said frequency to voltage converter (128) by closing any of said six switches (S109, S110, S111, S112, S113, S114).

22. An assembly as set forth in claim 21 further characterized by said adjustment means including said counter (140) with the input connected to the output of said first operational amplifier (136) and said divider resistors (R110-R112) and switches (S106-S108) including a sixth switch IR106) and resistor (R112) connected to the output of said first operational amplifier and the output of said adjustment means for dividing the amplified input signal by one when the sixth switch is closed, a seventh switch (S107) and resistor (R111) connected to a first output of said counter and the output of said adjustment means for dividing the amplified input signal by two when the seventh switch is closed, an eighth switch (S108) and resistor (R110) connected to a second output of said counter and the output of said adjustment means for dividing said amplified signal by for when the eighth switch is closed.

23. An assembly as set forth in claim 22 further including hourmeter means (138, 130, 134) for indicating on-time of said assembly which includes an oscillator (138), a driver (130) and stepper motor (134) for time indication.

24. A method of monitoring a cycling member to provide accurate meter readings for various configurations of the cycling member, the steps of:

producing an input signal with frequency proportional to cycle speed of a monitored member, filtering out frequencies from the input signal above a predetermined frequency to produce a filtered frequency signal, adjusting the predetermined frequency in relationship to the configuration of the cycling member, changing the filtered frequency signal by a predetermined ratio to produce a repetitive rate adjusted frequency signal, and converting the adjusted frequency signal into a drive signal applied to said display means applied to said display means for indicating cycle rate to provide accurate meter readings for various configurations affecting said cycling member.

25. A method as set forth in claim 24 further including amplifying the magntiude of the filtered frequency signal to a predetermined potential level producing an amplified input signal.

26. A method as set forth in claim 25 further including dividing said amplified input signal to a variable frequency proportional to the input signal.

27. A method as set forth in claim 26 further including conditioning said repetitive signal for operation of the display means.