Matrix of light-emitting elements and method of manufacturing same
First Claim
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1. A light-emitting matrix comprising:
- a thermally conductive generally planar substrate having an upper surface, a lower surface, and an array of holes therethrough, at least said surfaces and inner surfaces of said holes being electrically insulating,a plurality of thermally and electrically conducting supports disposed in respective holes, each support having an upper end extending above said upper surface, and a lower end extending downwardly at least to said lower surface,a plurality of lower electrically conducting tracks formed on said lower surface in a pattern, each support having at least a portion of the lower end covered by and electrically connected to a selected one of said lower tracks,a plurality of insulating rings, each ring disposed around a respective upper end of a support and having a lower ring surface engaging said upper insulating surface,a plurality of conducting rings, each ring disposed around a respective insulating ring,a plurality of upper electrically conducting tracks formed on said upper surface in a pattern, each conducting ring being electrically connected to a selected one of said upper tracks,a plurality of light-emitting elements, each element being disposed on and having an electrical connection to an upper end surface of a respective support, and each element having an electrical connection to the respective conducting ring disposed around said respective support, anda wafer having an insulating lower surface engaging said substrate and having a corresponding array of openings formed therein, each opening surrounding a respective conducting ring with a small clearance;
said wafer having a corresponding array of optical collimation elements formed therein communicating with the openings in the wafer, arranged such that each collimation element has a focus located at the light-emitting element disposed on the support which is within the respective opening.
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Abstract
An electrically insulating substrate has an array of holes formed in it for accepting electrically conducting support pins, each pin having a light-emitting element mounted on the upper pin end. Each upper pin end is surrounded by an insulating ring and a conducting ring, the light emitting element being connected electrically between the conducting pin and the conducting ring. Electrical connections are made via a printed wiring pattern on each surface of the substrate. Optical collimating elements are formed in a wafer having openings that surround each of the conducting rings with a small clearance, the wafer engaging and being insulated from the substrate with the printed wiring.
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2 Claims
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1. A light-emitting matrix comprising:
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a thermally conductive generally planar substrate having an upper surface, a lower surface, and an array of holes therethrough, at least said surfaces and inner surfaces of said holes being electrically insulating, a plurality of thermally and electrically conducting supports disposed in respective holes, each support having an upper end extending above said upper surface, and a lower end extending downwardly at least to said lower surface, a plurality of lower electrically conducting tracks formed on said lower surface in a pattern, each support having at least a portion of the lower end covered by and electrically connected to a selected one of said lower tracks, a plurality of insulating rings, each ring disposed around a respective upper end of a support and having a lower ring surface engaging said upper insulating surface, a plurality of conducting rings, each ring disposed around a respective insulating ring, a plurality of upper electrically conducting tracks formed on said upper surface in a pattern, each conducting ring being electrically connected to a selected one of said upper tracks, a plurality of light-emitting elements, each element being disposed on and having an electrical connection to an upper end surface of a respective support, and each element having an electrical connection to the respective conducting ring disposed around said respective support, and a wafer having an insulating lower surface engaging said substrate and having a corresponding array of openings formed therein, each opening surrounding a respective conducting ring with a small clearance;
said wafer having a corresponding array of optical collimation elements formed therein communicating with the openings in the wafer, arranged such that each collimation element has a focus located at the light-emitting element disposed on the support which is within the respective opening.
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2. A method of manufacturing a matrix of light-emitting elements, characterized by comprising:
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(a) providing a thermally conducting substrate having an array of holes therethrough, and at least electrically insulating upper and lower surfaces and inner surfaces of said holes, (b) forming conductor tracks according to a desired geometry at least on said upper surface, (c) providing a plurality of supports each comprising an electrically conducting pin having an upper surface and a lower surface, and inserting said supports into respective holes with said support upper surfaces extending above said substrate upper surface, (d) providing an insulating ring, and a conducting ring surrounding the insulating ring, around an upper extending portion of each conducting pin, with the conducting ring in electrical contact with at least one selected conductor track, (e) uniting said conducting rings with the respective conductor tracks on the upper surface of the substrate, (f) forming conductor tracks according to a desired pattern on the substrate lower surface, with each support pin lower surface being in electrical contact with at least one conductor back on the lower surface, (g) uniting the conducting pins with the corresponding tracks on the substrate lower surface, and (h) providing a wafer having an insulated lower surface, an array of cylindrical insulating openings, and an array of optical collimation elements respectively communicating with openings in the wafer, and securing the wafer to the substrate with the insulating lower surface of the wafer engaging the substrate and the openings in the wafer surrounding respective conducting rings with a small clearance.
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Specification