Pipeline-controlled information processing system for generating updated condition code

• US 4,742,453 A
• Filed: 07/03/1984
• Issued: 05/03/1988
• Est. Priority Date: 07/06/1983
• Status: Expired due to Fees

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Shibuya, Toshiteru
• Primary Examiner(s): Williams, Jr., Archie E.
• Assistant Examiner(s): Chan, Emily Y.
• Application Number:
  US06/627,615
• Time in Patent Office: 1,400 Days
• Field of Search: 364/200 MS File, 364/900 MS File
• US Class Current: 712/234
• CPC Class Codes: G06F 9/30094 Condition code generation, e.g. Carry, Zero flag
• CPC Class Codes: G06F 9/3844 using dynamic branch prediction, e.g. using branch history tables

Abstract

The system includes a fetching circuit which sequentially fetches instructions to be executed. Certain of the instructions require that a predetermined condition code be present prior to being executed and certain of the instructions cause a condition code to be generated as a result of their execution. Condition code generators are provided for generating condition codes in response to execution of the instructions causing generation of condition codes. A circuit is also provided which is responsive to the sequentially fetched instructions for individually determining which of the instructions is to cause generation of a condition code, and which of the condition code generators is to generate a condition code for each of the determined instructions. The determined condition code generators are monitored, and a decision is made as to when a valid condition code has been generated by the monitored generator. A signal is produced when a valid condition code is generated. A decision circuit is connected to the fetching circuit for deciding which of the instructions requires the presence of a condition code prior to being executed. The decision circuit is connected to receive the signal indicative of a generated valid condition code, and is connected to inhibit the fetching circuit when a next sequential instruction requires the presence of a valid condition code and the signal is not present.

Claims

1. A pipeline-oontrolled information processing system for executing programmed instructions, comprising:

means for providing instructions;

a plurality of operation units for performing operations in response to said instructions;

a plurality of condition code generator units connected to said operation units for monitoring operations performed by said operation units and generating condition codes in response to said operations, each condition code generator unit having a counter section and an operating section for operating said counter section in the event of generation of a condition code;

a condition-code-updating instruction discrimination unit connected to said condition code generator units and including means for determining one of said condition code generator units to be used to generate a condition code in response to each of said instructions, and means responsive to said determining means for actuating the counter section of said determined generator unit to produce a count; and

a condition-code-establishment decision unit connected to said condition code generator units and including means for monitoring counts held by the plurality of counter sections and means responsive to said monitoring means for producing a signal indicative of the generation of an updated condition code of the determined condition code generator unit and the updated condition code if an updated condition code has been generated by the determined condition code generator unit.

2. A pipeline-controlled information processing system, comprising:

means for holding a plurality of instructions to be executed;

means for sequentially fetching said instructions to be executed from said holding means, certain of said instructions requiring that a predetermined condition code be present prior to execution, and certain of said instructions causing a condition code to be generated as a result of their execution;

means for executing said instructions;

a plurality of condition code generator units connected to said executing means for generating condition codes in response to execution of said instructions causing generation of condition codes;

means connected to said fetching means and being responsive to said sequentially fetched instructions for individually determining which of said instructions is to cause generation of a condition code, and which of said condition code generator units is to generate a condition code for each of said determined instructions;

means for monitoring the determined condition code generator unit, deciding when a valid condition code has been generated by the monitored determined unit and producing a signal indicative of a generated valid condition code; and

decision circuit means connected to said fetching means for deciding which of said instructions requires the presence of a condition code prior to being executed, said decision circuit means being connected to receive said signal indicative of a generated valid condition code from said monitoring means and being connected to inhibit said fetching means when a next sequentially instruction requires the presence of a valid condition code and said signal indicative of a generated valid condition code is not present.

3. A system as set forth in claim 2 wherein each of said condition code generator units comprises a connected means to be set by said determining means to indicate that the connected condition code generating means has been determined, and reset when a valid condition code has been generated by the connected condition code generating means.

4. A system as set forth in claim 3 wherein said means for being set and reset comprises a counter which is increased when set and decressed when reset.

5. A system as set forth in claim 3 further wherein each of said condition code generator units comprises a register for storing a condition code.

6. A system as set forth in claim 5 wherein said monitoring means receives inputs from each of said means to be set and reset and from each of said registers for storing a condition code.

7. A system as set forth in claim 2 including at least two registers for holding data, and at least one logical operation unit for operating on said data in said two registers under control of said instructions fetched by said fetching means for producing a logical output, one of said condition code generators being responsive to said logical output for producing a condition code.

8. A system as set forth in claim 7 further including at least one arithmetic operation unit for performing arithmetic operations under control of said instructions on data stored in said two registers to produce an arithmetic output, one of said condition code generators being responsive to said arithmetic output to produce a condition code.

9. A system as set forth in claim 2 wherein each of said instructions includes a portion forming an instruction code to indicate a predetermined operation to be carried out, and includes a portion indicating the location of data to be operated on, and wherein said system includes operation units for carrying out said operations indicated by said instruction codes, said condition code generator units being connected, respectively, with said operation units, said operations indicated by said instruction codes being defined as either causing generation of a condition code or not causing operation of a condition code, said determining means comprising a condition code updating instruction discriminating unit which receives said instruction code from each instruction, determines whether an instruction causes generation of a condition code, and in response to determining that an instruction causes generation of a condition code, transmits a signal to said monitoring means indicating one of said condition code generator units connected with one of said operation units which will carry out the operation designated by said determined instruction code.

10. A system as set forth in claim 9 wherein said descision circuit also receives said instruction code from each instruction, and, in response to instructions requiring a condition code prior to being executed, passes said signal from said monitoring means to said fetching means to cause said inhibiting of said fetching means.

11. A method of operating a pipeline controlled information processing system, comprising:

storing a plurality of instructions having instruction codes defining operations to be performed by said system, each instruction code containing an indication of whether a respective operation requires a condition code prior to being executed and whether each respective operation produces a condition code update during its execution;

sequentially fetching said stored instructions, each instruction including one of said instruction codes;

examining each fetched instruction in order and determining whether, when executed, the operation indicated by the instruction code of the fetched instruction produces a condition code update or requires a condition code to be generated by a preceding instruction before execution;

for each instruction determined to produce a condition code during execution, executing said determined instruction and producing a condition code during execution of said determined instruction; and

for each instruction requiring a condition code prior to being executed, inhibiting execution, monitoring the condition code status of a preceding instruction determined to produce a condition code, and proceeding with execution when the required condition code is generated.

12. A method as set forth in claim 11 wherein said step of monitoring comprises monitoring the condition code status of an immediately preceding instruction which produces a condition code.

13. A method as set forth in claim 11 wherein said step of producing a condition code includes producing both a condition code and a signal indicating that the produced condition code is valid.