Power saving intermittently operated phase locked loop
First Claim
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1. A phase-locked oscillator comprising:
- a phase-locked loop which includes a reference oscillator, a reference frequency divider for dividing the output of said reference oscillator, a voltage-controlled oscillator, a first frequency divider for dividing the output of said voltage-controlled oscillator, a phase comparator for comparing respective phases of the output of said reference frequency divider and the output of said first frequency divider, and a loop filter generating a control voltage from the output of said phase comparator, said control voltage being applied to said voltage-controlled oscillator;
a first switch for interrupting intermittently an electric power supplied from an electric power source to at least one of said reference oscillator, said reference frequency divider, said first frequency divider, said phase comparator and said loop filter;
a second switch for interrupting intermittently said control voltage in synchronism with said first switch;
a control voltage hold circuit located between said second switch and said voltage-controlled oscillator for holding said control voltage at a time when said second switch is changed from ON-state to OFF-state;
a detecting circuit for detecting a transient at which said first switch is changed from an OFF-state to an ON-state; and
an initial state setting circuit responsive to a detecting operation of said detecting circuit for initializing said reference frequency divider and said first frequency divider.
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Abstract
In an intermittently operative phase-locked loop, in order to prevent the oscillator frequency from significantly changing at the time of turning on of an electric power source, a point in time at which a phase difference between clock signals respectively fed to a reference frequency divider and to a frequency divider for dividing the output frequency of a voltage-controlled oscillator becomes substantially zero is detected, and the two frequency dividers are initialized when the above-mentioned point in time is detected after turning on of the electric power source.
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Citations
18 Claims
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1. A phase-locked oscillator comprising:
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a phase-locked loop which includes a reference oscillator, a reference frequency divider for dividing the output of said reference oscillator, a voltage-controlled oscillator, a first frequency divider for dividing the output of said voltage-controlled oscillator, a phase comparator for comparing respective phases of the output of said reference frequency divider and the output of said first frequency divider, and a loop filter generating a control voltage from the output of said phase comparator, said control voltage being applied to said voltage-controlled oscillator; a first switch for interrupting intermittently an electric power supplied from an electric power source to at least one of said reference oscillator, said reference frequency divider, said first frequency divider, said phase comparator and said loop filter; a second switch for interrupting intermittently said control voltage in synchronism with said first switch; a control voltage hold circuit located between said second switch and said voltage-controlled oscillator for holding said control voltage at a time when said second switch is changed from ON-state to OFF-state; a detecting circuit for detecting a transient at which said first switch is changed from an OFF-state to an ON-state; and
an initial state setting circuit responsive to a detecting operation of said detecting circuit for initializing said reference frequency divider and said first frequency divider. - View Dependent Claims (2, 3)
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4. An intermittently operative phase-locked oscillator comprising:
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a phase-locked loop which includes a voltage-controlled oscillator, a first frequency divider for dividing the output of said voltage-controlled oscillator, a reference oscillator, a second frequency divider for dividing the output of said reference oscillator, a phase comparator for comparing respective phases of the output of said first frequency divider and the output of said second frequency divider, and a loop filter generating a control voltage from the output of said phase comparator, said control voltage being applied to said voltage-controlled oscillator, a first switch for interrupting intermittently an electric power supplied to at least one of said first frequency divider, said reference oscillator, said second frequency divider, said phase comparator and said loop filter by an intermittent operation signal, and a control voltage hold circuit connected between said loop filter and said voltage-controlled oscillator for holding said control voltage during a period of interruption of the electric power supply; a zero-phase detecting circuit for detecting a state in which a difference in instantaneous phase between a first clock signal fed into said first frequency divider and a second clock signal fed into said frequency divider becomes substantially zero so as to generate a zero-phase signal; a preset pulse generating circuit for generating a preset pulse in synchronization with said zero-phase signal generated after said first switch is switched on; and said first and second frequency dividers being arranged to be simultaneously initialized to each initial state by said preset pulse. - View Dependent Claims (5, 6, 7, 8, 9, 10, 12, 13, 14, 15)
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11. A phaes-locked oscillator according to calim 9, in which said zero-phase detecting circuit is reset to its initial state by said reset pulse.
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16. An intermittently operative phase-locked oscillator comprising:
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a phase-locked loop which includes a voltage-controlled oscillator, a first frequency divider for dividing the output of said voltage-controlled oscillator, a reference oscillator, a second frequency divider for dividing the output of said reference oscillator, a phase comparator for comparing respective phases of the output of said first frequency divider and the output of said second frequency divider, a loop filter generating a control voltage from the output of said phase comparator and applying said control voltage to said voltage-controlled oscillator, and a first switch for interrupting an electric power supply by an intermittent operation control signal for at least said first frequency divider and said second frequency divider, comprising; a zero-phase detecting circuit for detecting that a difference in instantaneous phase between a first clock signal to said first frequency divider and a second clock signal to said seccond frequency divider becomes substantially zero so as to generate a zero-phase signal; a preset pulse generating circuit for generating a preset pulse in synchronization with said zero-phase signal generated at first after said electric power supply for said first and second frequency dividers is switched on by said intermittent control signal; and a control circuit for generating a first gate signal to turn off two second switches and to make a charge pump circuit in a "high impedance" state during a period from just before interruption of said electric power supply by said intermittent operation control signal till said zero-phase signal is generated at first after switching on of said electric power supply, said first and second frequency dividers being arranged to be simultaneously initialized to each initial state by said preset pulse, said phase comparator being constituted by said two second switches, a phase comparing circuit and said charge pump circuit, said two second switches interrupting each of said outputs of said first and second frequency dividers into said phase comparing circuit in response to said first gate signal, said charge pump circuit converting an output of said phase comparing circuit into analog voltage signal and becoming in a "high impedance" state in response to said first gate signal. - View Dependent Claims (17, 18)
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Specification