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Hardware modeling system and method for simulating portions of electrical circuits

  • US 4,744,084 A
  • Filed: 07/08/1987
  • Issued: 05/10/1988
  • Est. Priority Date: 02/27/1986
  • Status: Expired due to Term
First Claim
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1. In a simulation system which includes plural workstations for independently and simultaneously simulating the response of electronic circuits to applied test data, a hardware modeling system for simulating the response of a plural pin circuit element by evaluating the behavior of an actual circuit element upon recognition by a workstation that the circuit element in an electronic circuit being simulated at the workstation corresponds to an actual circuit element in the hardware modeling system, the hardware modeling system comprising:

  • hardware modeling circuit means including input means for receiving input test data from the workstation, stimulus signal generation means coupled to the input means for converting the input test data into evaluation stimuli corresponding to the input test data, application means coupled to the stimulus signal generation means for applying the evaluation stimuli to the actual circuit element, resultant test data retrieval means coupled coupled to the actual circuit element for receiving output signals from the actual circuit element and for converting the output signals to resultant test data, the output signals being generated by the actual circuit element in response to the applied evaluation stimuli, and output means coupled to the retrieval means for receiving the resultant test data; and

    network interface means for coupling the plural workstations to the hardware modeling circuit means so as to provide concurrent access by each of the workstations to the hardware modeling circuit means, said network interface means comprising means for coupling the workstations to the input means and for transferring input test data from a workstation to the input means upon recognition that the plural pin circuit element being stimulated at the workstation corresponds to an actual circuit element in the hardware modeling system, the network interface means also comprising means coupling the output means to the workstations and for transfering resultant test data from the output means to the workstation following completion of a simulation, the network interface means thereby comprising means for interfacing the workstations to the hardware modeling circuit means so as to permit sharing of the hardware modeling circuit means among the workstations for concurrent circuit simulations by the workstations.

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