Memory organization apparatus and method
First Claim
1. An improved memory organization for use in a computer display system including a display having a plurality of display pixels for defining images, comprising:
- a frame buffer memory having a plurality of selectively addressable memeory cells organized into a three-dimensional matrix, wherein each of said memory cells is adapted for storing a data bit defining selected characteristics of a corresponding display pixel and wherein said memory cells are relatable by a first bit organization oriented in a first plane of said matirx and a second bit organization orientied in a second plane of said matrix;
said first and second bit organizations defining, respectively, first and second characteristics among said selected characteristics;
reading means coupled to said frame buffer memory for selectively reading, in one memory cycle operation, a plurality of bits from memory cells related by one of said bit organizations and defining one of said first or said second characteristics;
writing means coupled to said frame buffer memory for selectively writing, in one memory cycle operation, a plurality of bits into memory cells related by one of said bit organizations and defining one of said first or second characteristics;
control logic means coupled to said reading means and said writing means for generating control signals for controllably selecting one of said first and second bit organizations;
whereby image data may be conveniently organized in a single memory array for selective storage and retrieval in one of said first and second bit organizations so as to provide said selected characteristics of said pixels.
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Accused Products
Abstract
An improved memory organization for use in a computer display system including a display having a plurality of display pixels for defining images that includes: a frame buffer memory having a plurality of memory cells organized into a matrix, said memory comprising first and second maps wherein the contents of the maps correspond to the pixels and define characteristics of the pixels, the maps being defined along X and Z axes of the matric; reading means coupled to the frame buffer memory for selectively reading, in one memory cycle operation, a plurality of bits from memory cells defining one of the maps; writing means coupled to said frame buffer memory for selectively storing, in one memory cycle operation, a plurality of bits into memory cells defining one of the maps; control logic means coupled to the reading means and the writing means for generating control signals for selectively reading a plurality of bits from one of the maps and writing a plurality of bits into one of the maps to define the images to be displayed on said display; wherein multiple maps may be defined in an array of memory cells, each of the maps providing different characteristics for the pixels of the display.
32 Citations
19 Claims
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1. An improved memory organization for use in a computer display system including a display having a plurality of display pixels for defining images, comprising:
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a frame buffer memory having a plurality of selectively addressable memeory cells organized into a three-dimensional matrix, wherein each of said memory cells is adapted for storing a data bit defining selected characteristics of a corresponding display pixel and wherein said memory cells are relatable by a first bit organization oriented in a first plane of said matirx and a second bit organization orientied in a second plane of said matrix;
said first and second bit organizations defining, respectively, first and second characteristics among said selected characteristics;reading means coupled to said frame buffer memory for selectively reading, in one memory cycle operation, a plurality of bits from memory cells related by one of said bit organizations and defining one of said first or said second characteristics; writing means coupled to said frame buffer memory for selectively writing, in one memory cycle operation, a plurality of bits into memory cells related by one of said bit organizations and defining one of said first or second characteristics; control logic means coupled to said reading means and said writing means for generating control signals for controllably selecting one of said first and second bit organizations; whereby image data may be conveniently organized in a single memory array for selective storage and retrieval in one of said first and second bit organizations so as to provide said selected characteristics of said pixels. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 19)
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18. An improved method of organizing a memory for use in a computer display system including a display having a plurality of display pixels for defining images, said method comprising the steps of:
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organizing a frame buffer memory having a plurality of selectively addressable memory cells, wherein each of said memory cells is adapted for storing data defining selected characteristics, into a three-dimensional matrix such that said memory cells are relatable by a first bit organization, which is oriented in a first plane of said matrix and a second bit organization oriented in a second plane of said matrix;
said first and second bit organizations defining, respectively, first and second characteristics among said selected characteristics;corresponding the contents of said memory cells to said pixels; coupling a reading means to said frame buffer for selectively reading, in one memory cycle operation, a plurality of bits from memory cells relatable by one of said bit orgaizations; reading selectively said plurality of bits from one of said bit organizations from said frame buffer with said reading means; coupling a writing means to said frame buffer memory, for selectively writing, in one memory cycle operation, a plurality of bits into memory cells relatable by one of said bit organizations; writing selectively said plurality of bits from one of said bit organization to define a selected one of said characteristics into said frame buffer with said writing means; coupling a control logic means to said reading means and said writing means and said frame buffer; generating control signals for selecting one of said bit organizations to define said images to be displayed on said display.
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Specification