Battery charging system with microprocessor control of voltage and current monitoring and control operations

• US 4,746,854 A
• Filed: 10/29/1986
• Issued: 05/24/1988
• Est. Priority Date: 10/29/1986
• Status: Expired due to Term

• Current Assignee: SPAN Incorporated
• Original Assignee: SPAN Incorporated
• Inventors: Stevens, James C., Baker, William, Chau, Phong B.
• Primary Examiner(s): Salce, Patrick R.
• Assistant Examiner(s): NOT, DEFINED
• Application Number:
  US06/925,832
• Time in Patent Office: 573 Days
• Field of Search: 320/20, 320/21, 320/22, 320/37, 320/40
• US Class Current: 320/130
• CPC Class Codes: H02J 7/0071 with a programmable schedule
• CPC Class Codes: H02J 7/007184 in response to battery voltage gradient
• CPC Class Codes: Y10S 320/12 Precharging analysis, e.g. determining presence of battery
• CPC Class Codes: Y10S 320/13 Fault detection
• CPC Class Codes: Y10S 320/18 Indicator or display
• CPC Class Codes: Y10S 320/19 Charger status, e.g. voltmeter
• CPC Class Codes: Y10S 320/21 State of charge of battery

Abstract

A battery charger system is provided in which a microprocessor is used to discontinue application of a high charge current when the battery voltage drops below a peak value by a value greater than a threshold value corresponding to stored digital data. The microprocessor is also used to obtain a discharge mode of operation and an autocycle mode of operation in which a charge operation is performed after a discharge operation, the microprocessor being responsive to actuation of keys of a keyboard. In performing various operations, the microprocessor is used in performing analog-to-digital conversions and it is additionally used in computing energy capacity and efficiency.

Claims

1. Control apparatus for battery current control, comprising:

battery terminals, power supply means, charging means coupling said power supply means to said battery terminals for supplying a charging current to a battery coupled to said battery terminals, voltage monitoring means coupled to said battery terminals, microprocessor means coupled to said voltage monitoring means for register of digital data corresponding to the voltage at said battery terminals and coupled to said charging means to apply a control signal thereto, said digital data including present battery voltage data corresponding to the voltage at said battery terminals at the time of register of said data, memory means associated with said microprocessor means for storage of digital data including peak voltage data reflecting the peak voltage reached in a charging operation and threshold data corresponding to a certain drop in voltage from said peak voltage, said microprocessor means being arranged to effect a charging operation in which said charging means is operated to apply a high charging current to said battery terminals and in which monitoring and control operations are periodically effected, each monitoring and control operation including registering of present battery voltage data and a comparison of said peak voltage data and the registered present battery voltage data, update of said peak voltage data when and only when said registered present battery voltage data has a value which is higher than the value of said peak voltage data and application of a control signal to said charge control means to stop application of a high charging current when said present battery voltage data has a value less than the value of said peak voltage data and when at the same time the difference between such values is greater than a threshold value corresponding to said threshold data.

2. In control apparatus as defined in claim 1, said digital voltage data being registered frequently and with a high resolution for precise determination of the magnitude of said present battery voltage and said peak voltage and prompt determination of a drop of said present battery voltage from said peak voltage, the frequency of registration of data and the resolution thereof being such that normal transient variations from one monitoring and control operation to the next subsequent monitoring and control operation produce a change of a certain number of bits in registered data, said threshold data corresponding to a number of bits at least as great as said certain number.

3. Control apparatus for battery current control, comprising:

battery terminals, power supply means, charging means coupling said power supply means to said battery terminals for supplying a charging current to a battery coupled to said battery terminals, voltage monitoring means coupled to said battery terminals, microprocessor means coupled to said voltage monitoring means for periodic registering of digital data including present battery voltage data corresponding to the voltage at said battery terminals at the time of register of said data and coupled to said charging means to apply a control signal thereto, memory means associated with said microprocessor means for storage of registered battery voltage data and digital control data, said microprocessor means being responsive to a charge start signal to operate in a pre-charge mode to control said charging means to apply a relatively low charge current to said battery terminals and to then monitor said digital data periodically to compare present and stored battery voltage data and determine the rate of change of battery voltage, said microprocessor means in said pre-charge mode being operative to discontinue application of current to said battery terminals when the voltage at said terminals fails to increase at least a certain rate and to otherwise initiate operation in a fast charge mode, said microprocessor means in said fast charge mode being operable to control said charging means to apply a high charge current to said battery terminals and to monitor said digital data and stop application of said high charging current when a full charge condition is reached.

4. Control apparatus for battery current control, comprising:

battery terminals, power supply means, charging means coupling said power supply means to said battery terminals for supplying a charging current to a battery coupled to said battery terminals, discharging means coupled to said battery terminals for discharging a battery coupled thereto, voltage monitoring means coupled to said battery terminals, microprocessor means coupled to said voltage monitoring means for periodic registering of digital data including present battery voltage data corresponding to the voltage at said battery terminals at the time of register of said data and coupled to said charging means and said discharging means to appIy control signals thereto, memory means associated with said microprocessor means for storage of registered battery voltage data and digital control data, said microprocessor means being responsive to a charge start signal to effect a charging operation with control signals being applied to said charging means while monitoring said digital data to apply charging current to said battery terminals until a full charge condition is reached, and said microprocessor means being responsive to a discharge start signal to effect a discharging operation with control signals being applied to said discharge means to draw current from said terminals until a predetermined discharge condition is reached, said microprocessor means during said discharging operation being operative to periodically effect monitoring and control operations each including arithmetic operations on digital data to terminate discharge when said predetermined discharge condition is detected and to otherwise store data for analysis in subsequent monitoring and control operations, said digital data having values including a first value corresponding to the said registered present voltage data and a second value corresponding to battery voltage data stored in a preceding monitoring and control operation, and said arithmetic operations including a determination of a first delta value equal to said second value minus said first value with said discharging operation being continued when said first delta value is less than a certain threshold value.

5. In control apparatus as defined in claim 4, said digital data values further including a third value corresponding to the battery voltage data which was registered and stored during the monitoring and control operation which preceded the preceding monitoring and control operation and wherein said arithmetic operations include a determination of a second delta value equal to said third value minus said second value with said discharging operation being continued when either said second delta value is greater than said first delta value or said first delta value is less than said threshold value.

6. In control apparatus as defined in claim 4, keyboard means for selectively applying an autocycle control signal, said microprocessor means being operable in response to said autocycle control signal to store digital autocycle control data in said memory means and to operate in an autocycle mode to initiate a discharging operation and to develop said charge start signal to initiate said charging operation after initiation of a discharging operation and in response to reaching said predetermined discharge condition.

7. Control apparatus for battery current control, comprising:

battery terminals, power supply means, charging means coupling said power supply means to said battery terminals for supplying a charging current to a battery coupled to said battery terminals, resistance means coupled in series between said charging means and said battery terminals, voltage monitoring means coupled to said battery terminals and said resistance means and selectively operable in a first mode to monitor the voltage between said battery terminals and in a second mode to monitor the voltage across said resistance means, microprocessor means coupled to said voltage monitoring means for operation thereof in said first mode and register of digital voltage data corresponding to the voltage at said battery terminals and for operation in said second mode and register of digital current data corresponding to the voltage across said resistance means, said microprocessor means being coupled to said charging means to apply control signals thereto, memory means associated with said microprocessor means for storage and supply of digital control data including a charge current value and charge termination control data, said microprocessor means being operable in response to said digital current data and charge current value to control said charging means and to apply a certain substantially constant charge current to said battery terminals and being operable in response to said digital voltage data to terminate application of said constant charge current when a full charge condition is reached.

8. In control apparatus as defined in claim 7, manual input means for input of selectable control data and storage thereof by said memory means, said selectable control data including said charge current value.

9. Control apparatus comprising:

input circuit means for supplying a control voltage, output circuit means, and control circuit means for controlling said output circuit means as a function of the magnitude of said control voltage, said control circuit means comprising voltage controlled oscillator means coupled to said input circuit means to develop a cyclic output signal having a period which is a function of said control voltage magnitude, microprocessor means having input and output ports and having oscillator means and real time counter means associated therewith, said oscillator means being operative to supply fixed clock signals for operation of said microprocessor means and said counter means, means coupling said output circuit means to said output ports, and means coupling said voltage controlled oscillator means to one of said input ports to apply said cyclic output signal thereto, said microprocessor means including means for responding to said cyclic output signal and to register data corresponding to the number of counts registered by said real time counter means during a predetermined integer number of cycles of said voltage controlled oscillator output signal, and means for controlling signals applied to said output ports in accordance with said registered data.

10. Apparatus as defined in claim 9 wherein said predetermined integer number is so related to the count capacity of said real time counter means, the frequency of clock pulses applied to said real time counter means and the range of duration of cycles of said voltage controlled oscillator means as to obtain a range of duration of said predetermined integer number of cycles which corresponds to the time required to produce a full count of said real time counter means, to maximize the resolution of measurement of said control voltage.

11. Apparatus as defined in claim 10 wherein said microprocessor means includes count offset means for obtaining a count offset such that the range of said registered data has a minimum value greater than but close to a zero value when the voltage controlled oscillator cycle duration is at a minimum and has a maximum value less than but close to the count capacity of said real time counter means when said voltage controlled oscillator cycle duration is at a maximum.

12. Apparatus as defined in claim 11 wherein said count offset means operates at the beginning of a measurement cycle for pre-loading said real time counter means with a predetermined count such as to obtain said count offset.

13. Apparatus as defined in claim 9 wherein said control circuit means further includes voltage offset means for supplying an offset voltage, and comparator means coupled to said input circuit means, said offset voltage means and said voltage controlled oscillator means, said comparator means being arranged for applying to said voltage controlled oscillator means a voltage which is proportional to the difference between said offset voltage and a voltage proportional to said control voltage.

14. Apparatus as defined in claim 13 wherein said voltage offset means is controllable by said microprocessor to control the value of said offset voltage in steps and to thereby divide the total range of measured control voltage magnitude into a plurality of adjoining ranges.

15. Apparatus as defined in claim 14 wherein said voltage offset means comprises a resistance ladder network.

16. Apparatus as defined in claim 14 wherein said microprocessor means includes means operable at each value of offset voltage to determine whether the measured voltage is within the corresponding current range and to charge the offset voltage to a different value when outside the current range.